WAVEFORM CONTROL METHOD, RADIO DEVICE, AND INTEGRATED CIRCUIT

    公开(公告)号:US20230198657A1

    公开(公告)日:2023-06-22

    申请号:US18168564

    申请日:2023-02-13

    CPC classification number: H04L1/0006 H04L27/10

    Abstract: Embodiments of the present disclosure provide a waveform control method, a radio device, a radio signal, a signal transmission link and an integrated circuit. The waveform control method includes: calling, by a chip structure, at least two types of frame-configuration parameters from an external storage and storing the frame-configuration parameters in a memory; acquiring a frame order, and calling corresponding frame-configuration parameters from the memory in sequence according to the frame order; and generating frame period signals according to the corresponding frame-configuration parameters. The frame period signals include at least two frames of signals.

    TRANSMISSION AND RECEIVER APPARATUS AND METHODS

    公开(公告)号:US20190068328A1

    公开(公告)日:2019-02-28

    申请号:US16111946

    申请日:2018-08-24

    Abstract: The present invention relates to an apparatus and a corresponding method for mapping error correction code encoded time-domain data of at least two mapping input data streams (S1, S2, . . . , Sn) onto a time-domain mapping output data stream (Q) having a frame structure, comprising a data input (102) for receiving said at least two mapping input data streams (S1, S2, . . . , Sn) each being segmented into data blocks (D1, D2, . . . , DN) carrying error correction code encoded data, a data mapper (104) for mapping the data blocks (D1, D2, . . . , DN) of said at least two mapping input data streams (S1, S2, . . . , Sn) onto frames of said mapping output data stream (Q), each frame comprising a number of frame intervals (F1, F2, . . . , FM), wherein the data mapper (104) is adapted for mapping the data blocks (D1, D2, . . . , DN) onto said frame intervals such that each frame interval (F1, F2, . . . , FM) carries sequentially arranged data blocks (D1, D2, . . . , DN) from various mapping input data streams (S1, S2, . . . , Sn) and that within a frame the mapping of data blocks (D1, D2, . . . , DN) from the various mapping input data streams (S1, S2, . . . , Sn) onto frame intervals (F1, F2, . . . , FM) is different from frame interval to frame interval, and a data output (110) for outputting said mapping output data stream (Q).

Patent Agency Ranking