Abstract:
A method for changing a signal value of an FPGA at runtime, including the steps of loading an FPGA hardware configuration with at least one signal value onto the FPGA, running the FPGA hardware configuration on the FPGA, setting the signal value for transfer to the FPGA, determining writeback data from the signal value, writing the writeback data as status data to a configuration memory of the FPGA, and transferring the status data from the configuration memory to the functional level of the FPGA. A method is also provided for performing an FPGA build, including the steps of creating an FPGA hardware configuration with a plurality of signal values, arranging signal values in adjacent areas of the FPGA hardware configuration, ascertaining memory locations of a configuration memory for status data of the plurality of signal values on the basis of the FPGA hardware configuration, and creating a list containing signal values.
Abstract:
A method for providing a real-time-capable simulation for control unit development, wherein the real-time-capable simulation simulates a control unit or an environment of a control unit or a combination of a control unit and an environment of the control unit. The real-time-capable simulation has a co-simulation of a real-time-capable sub-simulation and a non-real-time-capable sub-simulation that interacts with the real-time-capable sub-simulation, wherein the real-time-capable sub-simulation and the non-real-time-capable sub-simulation are designed for communication of simulation data. The real-time-capable sub-simulation has a first simulation time corresponding to real time and the non-real-time-capable sub-simulation has a virtual, second simulation time that is coupled to the first simulation time and that matches the first simulation time at the start of the real-time-capable simulation.
Abstract:
A method and device for transmitting metrologically acquired and digitized measured data in a test device. The measured data corresponds to a program task, and a direction of the transmission of the measured data from a measured data transmitter of the test device is provided via a data channel to a measured data receiver of the test device. The measured data transmitter has a signal preprocessing processor, a task monitoring processor and a data channel arbiter. Via the task monitoring processor, a task ID data packet is generated at an execution start of the program task or at an execution end of the program task, and the task ID data packet is transmitted to the data channel arbiter. Via the data channel arbiter, the measured data and the task ID data packet are successively forwarded via the data channel as a data stream to the measuring data receiver.
Abstract:
A method for generating production code from a block diagram on a host computer is provided. A block in the block diagram has a number of input ports for receiving signals and a number of output ports for sending signals. The processor identifies a first block in the block diagram. The input signal is traced back to a second block upstream of the first block. Compliance with a optimization condition is checked, the optimization condition being fulfilled when a group of adjacent blocks has an assignment operation that affects one or more elements of the input signal while leaving at least one element of the composite variable unchanged. A combined production code is generated for the group of adjacent blocks when the optimization condition is fulfilled so that the combined production code includes write instructions for those elements of the composite variable that are affected by the assignment operation.
Abstract:
A computer-implemented method for generating a control program that is executable on a control system from a graphical control model. A better utilization of the control system is achieved in that the graphical control model is translated into program code such that the generated program code has at least one FXP operation and at least one FLP operation, and in that the generated program code is translated into the executable control program such that when the control program is executed on the control system a portion of the control program is executed on the FXP unit and another portion of the control program is executed on the FLP unit.
Abstract:
A method for executing a first application program of a first control unit on a computer, wherein functions for controlling actuators and/or sensors and/or functions for processing and/or providing data from actuators and/or sensors are executed by the first application program. A first interface between a control unit hardware and a first application program of the control unit is established by the control unit operating system. A first virtual control unit operating system and a first virtual application program are generated by compilation. A simulation environment interface is made available by the simulation environment for transfer of a data item and/or of an event to the first virtual application program and/or the virtual control unit operating system. The simulation environment initiates and controls an execution of the first virtual application program within the control unit operating system within the first virtual machine through the simulation environment interface.
Abstract:
A method for creating an FPGA netlist generated from an FPGA source code and at least one shadow register. The FPGA source code defines at least one function and at least one signal. The shadow register is assigned to the at least one signal, and is arranged and provided to store the value of the assigned signal at runtime. An option for reading out the stored signal value at runtime is provided. The function defined in the FPGA source code is not changed by the shadow register. The function described by the FPGA source code is executed by the FPGA, and a functional decoupling of the shadow register from the function described in the FPGA source code is provided. Via the decoupling, the shadow register maintains the signal value stored at the time of the decoupling while the function described in the FPGA source code is being executed.
Abstract:
A circuit arrangement for connecting a bus participant to at least one bus, having an interface for connecting the bus participant to the circuit arrangement, a first bus input, and a first bus output between which the bus participant is switchable via the interface. The circuit arrangement includes a second bus input and output for connecting the bus to the circuit arrangement in a ring topology in such a way that the first bus output is connected at least indirectly to the second bus input and the second bus output is connected at least indirectly to the first bus input via the bus. The bus in the circuit arrangement can be separated to obtain a line topology and can be configured as bus-terminating at one of the bus inputs or bus outputs. A system for the functional testing of bus participants on a bus in a simulation environment is provided.
Abstract:
A method for calculating a desired trajectory for a vehicle is provided. The vehicle is located at a position on a road bounded by two road edges, wherein the road edges are known at least in a region around the position of the vehicle. A spring-mass model is introduced, wherein the spring-mass model is used for calculating the desired trajectory, wherein the positions of the point masses are calculated for a rest state of the spring-mass model, and the calculated positions of the point masses are used as data points for the calculation of a curve connecting the point masses, whereby the curve represents the desired trajectory.
Abstract:
A computer-implemented method for editing data object variants of at least one software tool is described and presented, whereby the data object variants have at least one common software/hardware attribute and in each case a configuration of the attribute. It is possible to react to changing configurations of hardware attributes of different data object variants and thereby to changing matching groups during the editing of a data object variant in that for at least one attribute matching configurations of the attribute in different data object variants are captured and that for the attribute information on matching groups of data object variants is stored with the matching configurations of the attribute.