公开(公告)号：US10978487B2

公开(公告)日：2021-04-13

申请号：US16288737

申请日：2019-02-28

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Hassan El Dirani ,  Pascal Fonteneau

IPC: H01L29/76 ,  H01L27/12 ,  H02M7/5387 ,  H01L29/417 ,  H03K19/10 ,  H03K19/00 ,  H03K19/094

Abstract: An inverter includes a semiconductor substrate. A Z2-FET switch is disposed at a first surface of the semiconductor substrate and a further switch is disposed at the first surface of the semiconductor substrate. The further switch and the Z2-FET switch have current paths coupled between a first reference terminal and a second reference terminal.

公开(公告)号：US10978340B2

公开(公告)日：2021-04-13

申请号：US16384147

申请日：2019-04-15

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Didier Dutartre ,  Jean-Pierre Carrere ,  Jean-Luc Huguenin ,  Clement Pribat ,  Sarah Kuster

IPC: H01L27/12 ,  H01L27/146 ,  H01L27/06 ,  H01L27/07 ,  H01L29/06 ,  H01L29/10 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/84 ,  H01L21/762 ,  H01L21/74 ,  H01L21/02

Abstract: A silicon on insulator substrate includes a semiconductor bulk handle wafer, an insulating layer on said semiconductor bulk handle wafer and a semiconductor film on said insulating layer. An opening extends completely through the semiconductor film and insulating layer to expose a surface of the semiconductor bulk handle wafer. Epitaxial material fills the opening and extends on said semiconductor film, with the epitaxial material and semiconductor film forming a thick semiconductor film. A trench isolation surrounds a region of the thick semiconductor film to define an electrical contact made to the semiconductor bulk handle wafer through the opening.

公开(公告)号：US10976494B2

公开(公告)日：2021-04-13

申请号：US16662810

申请日：2019-10-24

Applicant: STMicroelectronics SA

Inventor： Cédric Durand ,  Frédéric Gianesello ,  Folly Eli Ayi-Yovo

IPC: B23K26/364 ,  C03C17/09 ,  G02B6/136 ,  G02B6/138 ,  G02B6/30 ,  C03C23/00 ,  B23K26/402 ,  B23K26/0622 ,  B23K103/00 ,  G02B6/12

Abstract: A method of manufacturing an optical device is disclosed. The method includes scanning along a curved path at a first surface of a glass plate with a laser beam directed orthogonally to the first surface to form a trench according to a pattern of a waveguide. The curved path is coincident with a longitudinal axis of the waveguide. The method further includes filling the trench with a material having an index different from that of glass to form the waveguide and, after filling the trench, depositing a cladding layer.

公开(公告)号：US10944257B2

公开(公告)日：2021-03-09

申请号：US15952466

申请日：2018-04-13

Applicant: STMicroelectronics International N.V. ,  STMicroelectronics SA

Inventor： Radhakrishnan Sithanandam ,  Divya Agarwal ,  Jean Jimenez ,  Malathi Kar

IPC: H02H9/02 ,  H02H9/04 ,  H01L27/02 ,  H01L27/07 ,  H01L29/06

Abstract: Electrostatic discharge (ESD) protection is provided in using a supply clamp circuit using an ESD event actuated SCR device. The SCR device may include an embedded field effect transistor (FET) having an insulated gate that receives a trigger signal from an ESD detection circuit. The SCR device may alternatively include a variable substrate resistor having an insulated gate that receives a trigger signal from an ESD detection circuit.

公开(公告)号：US20210020663A1

公开(公告)日：2021-01-21

申请号：US16926128

申请日：2020-07-10

Applicant: STMicroelectronics SA

Inventor： Philippe GALY ,  Thomas BEDECARRATS

IPC: H01L27/12

Abstract: An integrated circuit includes a MOS transistor that is located in and on a semiconductor film of a silicon-on-insulator (SOI) substrate. The SOI substrate has, below a buried insulator layer, a first back gate region and two first auxiliary regions that are located, respectively, below source and drain contact regions of the MOS transistor. The conductivity type of the two first auxiliary regions is the opposite the conductivity type of the first back gate region. The conductivity type of the two first auxiliary regions is identical to the conductivity type of the source and drain contact regions of the MOS transistor.

公开(公告)号：US20210003770A1

公开(公告)日：2021-01-07

申请号：US17026819

申请日：2020-09-21

Applicant: STMicroelectronics SA

Inventor： Folly Eli Ayi-Yovo ,  Cédric Durand ,  Frédéric Gianesello

IPC: F21V8/00 ,  G02B6/36 ,  G02B6/02 ,  G02B6/30 ,  B23K26/00 ,  B23K26/364 ,  B23K26/402 ,  B23K26/0622 ,  G02B6/12

Abstract: An embodiment optical device includes a glass plate, a first trench disposed in the glass plate, and a second trench disposed in the glass plate. The second trench crosses the first trench, and the first trench has an open end in a first wall of the second trench. The optical device includes a waveguide disposed inside the first trench, where the waveguide is formed of a material having a refractive index different from that of the glass plate, and a mirror on a second wall of the second trench opposite the first wall and waveguide. The optical device includes an encapsulation layer filling the second trench and covering all of an upper surface of the waveguide and having a refractive index that is different from the waveguide and the glass plate.

公开(公告)号：US20200379178A1

公开(公告)日：2020-12-03

申请号：US16889164

申请日：2020-06-01

Applicant: STMicroelectronics SA

Inventor： Frederic GIANESELLO ,  Ophelie FOISSEY ,  Cedric DURAND

IPC: G02B6/27 ,  G02B6/34

Abstract: An integrated optoelectronic or optical device is formed by a polarization-splitting grating coupler including two optical waveguides, a common optical coupler and flared optical transitions between the optical coupler and the optical waveguides. The optical coupler is configured for supporting input/output of optical waves. A first region of the optical coupler lies at a distance from the flared optical transitions. The first region includes a first recessed pattern. Second regions of the optical coupler lie between the first region and the flared optical transitions, respectively, in an adjoining relationship. The second regions include a second recessed pattern different from the first recessed pattern.

公开(公告)号：US10782468B2

公开(公告)日：2020-09-22

申请号：US15730415

申请日：2017-10-11

Applicant: STMicroelectronics SA

Inventor： Folly Eli Ayi-Yovo ,  Cédric Durand ,  Frédéric Gianesello

IPC: F21V8/00 ,  G02B6/02 ,  G02B6/36 ,  G02B6/30 ,  B23K26/00 ,  B23K26/364 ,  B23K26/402 ,  B23K26/0622 ,  G02B6/12 ,  B23K103/00

Abstract: The present invention relates to a method for manufacturing an optical device comprising forming a first trench in a glass plate and a second trench perpendicular to the first trench, wherein the first trench has an end opening into the second trench. The trenches are treated with hydrofluoric acid. The first trench is filled with a material to form a waveguide, and a mirror is formed on the wall of the second trench opposite the waveguide. An encapsulation layer is deposited over the glass plate, waveguide and second trench.

公开(公告)号：US20200293481A1

公开(公告)日：2020-09-17

申请号：US16819681

申请日：2020-03-16

Applicant: STMicroelectronics SA

Inventor： Pierre Busson

IPC: G06F13/40 ,  H02J50/10 ,  H02J50/80 ,  H04B5/00 ,  G06F13/42

Abstract: In an embodiment, a method includes receiving in parallel first data and second data; and delivering in series the first and second data, where the first data comprises electric power delivery configuration data. In some embodiments, delivering in series the first and second data includes delivering the first and second data wirelessly.

公开(公告)号：US20200293474A1

公开(公告)日：2020-09-17

申请号：US16802116

申请日：2020-02-26

Applicant: STMicroelectronics SA ,  STMICROELECTRONICS (ROUSSET) SAS

Inventor： Olivier Ferrand ,  Daniel Olson ,  Anis Ben Said ,  Emmanuel Ardichvili

IPC: G06F13/364 ,  G06F13/362 ,  G06F13/42

Abstract: In accordance with an embodiment, a method for managing access to a bus shared by interfaces includes: when to the bus is granted to one of the interfaces, triggering a counting having a minimum counting period; and when at least one access request to the bus emanating from at least one other of the interfaces is received during the minimum counting period, releasing the access granted to the one of the interfaces, and creating an arbitration point at an end of the minimum counting period.