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    OPTICAL POWER MODULATORS WITH UNLOADED TRANSMISSION LINES
    212.
    发明申请
    OPTICAL POWER MODULATORS WITH UNLOADED TRANSMISSION LINES 有权

    公开(公告)号：US20220252910A1

    公开(公告)日：2022-08-11

    申请号：US17170237

    申请日：2021-02-08

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Michal Rakowski ,  Abdelsalam Aboketaf ,  Kevin K. Dezfulian ,  Massimo Sorbara

    IPC: G02F1/025 ,  G02F1/015

    Abstract: Structures for an optical power modulator and methods of fabricating a structure for an optical power modulator. A first waveguide core includes first and second sections. A second waveguide core includes a first section laterally adjacent to the first section of the first waveguide core and a second section laterally adjacent to the second section of the first waveguide core. An interconnect structure is formed over the first waveguide core and the second waveguide core. The interconnect structure includes first and second transmission lines. The first transmission line is physically connected within the interconnect structure to the first section of the first waveguide core. The second transmission line includes a first section physically connected within the interconnect structure to the second section of the first waveguide core and a second section adjacent to the first transmission line.

    CHIP MODULE WITH ROBUST IN-PACKAGE INTERCONNECTS
    214.
    发明申请
    CHIP MODULE WITH ROBUST IN-PACKAGE INTERCONNECTS 有权

    公开(公告)号：US20220238448A1

    公开(公告)日：2022-07-28

    申请号：US17160447

    申请日：2021-01-28

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Saquib B. Halim ,  Frank G. Kuechenmeister ,  Kashi V. Machani ,  Christian Goetze

    IPC: H01L23/538 ,  H01L23/00

    Abstract: Disclosed are chip module structures, each having a robust in-package interconnect for reliable performance. Some of the chip module structures achieve interconnect robustness through the use of vias in a spiral step pattern within the interconnect itself. Some chip module structures achieve interconnect robustness through the use of an interconnect stabilizer (referred to herein as a stabilization structure, fence or cage)), which includes vias in a repeating step pattern encircling the in-package interconnect, which is electrically isolated from back side solder balls, front side collapse chip connections (referred to herein as C4 connections), and the interconnect itself, and which is optionally connected to ground. Some chip module structures achieve interconnect robustness through the use of a combination of both vias in a spiral step pattern within the interconnect itself and an interconnect stabilizer.

    EDGE COUPLERS IN THE BACK-END-OF-LINE STACK OF A PHOTONICS CHIP
    216.
    发明申请
    EDGE COUPLERS IN THE BACK-END-OF-LINE STACK OF A PHOTONICS CHIP 有权

    公开(公告)号：US20220229250A1

    公开(公告)日：2022-07-21

    申请号：US17151955

    申请日：2021-01-19

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yusheng Bian ,  Roderick A. Augur ,  Kenneth J. Giewont ,  Karen Nummy

    IPC: G02B6/42 ,  F21V8/00 ,  G02B6/30

    Abstract: Structures including an edge coupler and methods of forming a structure including an edge coupler. The structure includes a waveguide core over a dielectric layer and a back-end-of-line stack over the dielectric layer and the waveguide core. The back-end-of-line stack includes a side edge and a truncated layer that is overlapped with a tapered section of the waveguide core. The truncated layer has a first end surface adjacent to the side edge and a second end surface above the tapered section of the waveguide core. The truncated layer is tapered from the first end surface to the second end surface.

    Stacked-waveguide polarizers with conductive oxide strips
    217.
    发明授权
    Stacked-waveguide polarizers with conductive oxide strips 有权

    公开(公告)号：US11385408B2

    公开(公告)日：2022-07-12

    申请号：US16849355

    申请日：2020-04-15

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yusheng Bian ,  Won Suk Lee

    IPC: G02B6/12 ,  G02B6/126 ,  G02B6/122

    Abstract: Structures for a polarizer and methods of forming a structure for a polarizer. A polarizer includes a first waveguide core and a layer that is positioned adjacent to a side surface of the first waveguide core. The layer is composed of a first material having a permittivity with an imaginary part that ranges from 0 to about 15. A second waveguide core is positioned over the first waveguide core. The second waveguide core is composed of a second material that is different in composition from the first material.

    Waveguide-confining layer with gain medium to emit subwavelength lasers, and method to form same
    219.
    发明授权
    Waveguide-confining layer with gain medium to emit subwavelength lasers, and method to form same 有权

    公开(公告)号：US11381053B2

    公开(公告)日：2022-07-05

    申请号：US16718329

    申请日：2019-12-18

    Applicant: GLOBALFOUNDRIES U.S. Inc.

    Inventor： Yusheng Bian ,  Ajey Poovannummoottil Jacob

    IPC: H01S3/063 ,  H01S3/16 ,  H01S3/091

    Abstract: Embodiments of the disclosure provide a waveguide-confining layer, a photonic integrated circuit (PIC) die with embodiments of a waveguide-confining layer, and methods to form the same. The waveguide-confining layer may include an oxide layer over a buried insulator layer, a silicon-based optical confinement structure embedded within or positioned on the oxide layer, and first and second blocking layers over the oxide layer and separated from each other by a horizontal slot. The first and second blocking layers include a metal or an oxide. A gain medium is positioned on the oxide layer and within the horizontal slot between the first and second blocking layers, and has a lower refractive index than each of the first and second blocking layers. The gain medium is vertically aligned with the silicon-based optical confinement structure, and a portion of the oxide layer separates the gain medium from the silicon-based optical confinement structure.

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