SUBGROUP SELECTION FOR VERIFICATION
    211.
    发明申请

    公开(公告)号:US20190378583A1

    公开(公告)日:2019-12-12

    申请号:US16205165

    申请日:2018-11-29

    Abstract: An apparatus, system, and method are disclosed for identifying and selecting a subgroup of memory cells for use during a programming or erasing operation, in order to execute the programming or erasing operation in less time, while avoiding over and under programming errors. Memory devices disclosed herein may include a state change/programming circuit, a counting circuit, a determination circuit, an identification circuit, and/or a subgroup selection circuit, where each of these circuits are configured to perform operations related to the overall process of identifying and selecting the subgroup of memory cells for utilization during a programming operation.

    LOCKOUT NOISE REDUCTION CIRCUIT FOR STORAGE DEVICES

    公开(公告)号:US20190267096A1

    公开(公告)日:2019-08-29

    申请号:US15908239

    申请日:2018-02-28

    Abstract: A circuit includes selected sense circuits configured to be connected to selected bit lines and unselected sense circuits configured to be connected to unselected bit lines during a sense operation. When the sense circuit is connected to the unselected bit line during the sense operation, the sense circuit is locked out in order to reduce current consumption. However, noise from the locked out sense circuit may be transmitted to the sense circuits connected to the selected bit lines through adjacent bit line coupling. In order to reduce the effect of the noise, charge transfer from the sense node may be blocked from passing to the unselected bit lines. Or, charge may be drained from the sense node, thereby preventing the charge from passing to the unselected bit lines.

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