公开(公告)号：US11127707B2

公开(公告)日：2021-09-21

申请号：US16512132

申请日：2019-07-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Tsung Chiu ,  Hui-Ying Hsieh ,  Hui Hua Lee ,  Cheng Yuan Chen

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/13 ,  H01L21/56

Abstract: A semiconductor package structure includes a base material, at least one semiconductor chip, an encapsulant, a depression structure, a redistribution layer and at least one conductive via. The semiconductor chip is disposed on the base material. The encapsulant is disposed on the base material and covers the at least one semiconductor chip. The encapsulant has an outer side surface. The depression structure is disposed adjacent to and exposed from of the outer side surface the encapsulant. The redistribution layer is disposed on the encapsulant. The conductive via is disposed in the encapsulant and electrically connects the semiconductor chip and the redistribution layer.

公开(公告)号：US20210288002A1

公开(公告)日：2021-09-16

申请号：US17336078

申请日：2021-06-01

Applicant: ADVANCED SEMICONDUCTOR ENGINEERING, INC.

Inventor： Chia-Hao SUNG ,  Hsuan-Yu CHEN ,  Yu-Kai LIN

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device package includes a semiconductor die, a first conductive element, a second conductive element, a metal layer, and a first redistribution layer (RDL). The semiconductor die includes a first surface and a second surface opposite to the first surface. The first conductive element is disposed on the second surface of the semiconductor die. The second conductive element is disposed next to the semiconductor die. The metal layer is disposed on the second conductive element and electrically connected to the second conductive element. The first RDL is disposed on the metal layer and electrically connected to the metal layer.

公开(公告)号：US20210287999A1

公开(公告)日：2021-09-16

申请号：US16817407

申请日：2020-03-12

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Fan-Yu MIN ,  Chen-Hung LEE ,  Wei-Hang TAI ,  Yuan-Tzuo LUO ,  Wen-Yuan CHUANG ,  Chun-Cheng KUO ,  Chin-Li KAO

IPC: H01L23/00 ,  H01L23/16 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A package structure and a manufacturing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The first electronic device is disposed on the wiring structure. The second electronic device is disposed on the wiring structure. The first electronic device and the second electronic device are disposed side by side. A gap between the first electronic device and the second electronic device is greater than or equal to about 150 μm.

公开(公告)号：US20210287997A1

公开(公告)日：2021-09-16

申请号：US16814704

申请日：2020-03-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chien-Fan CHEN ,  Yu-Ju LIAO

IPC: H01L23/552 ,  H01L23/31 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: The present disclosure provides a substrate structure. The substrate structure includes an interconnection structure, a dielectric layer on the interconnection structure, an electronic component embedded in the dielectric layer, and a first conductive via penetrating through the dielectric layer and disposed adjacent to the electronic component. The interconnection structure includes a carrier having a first surface and a second surface opposite to the first surface, a first conductive layer disposed on the first surface of the carrier, and a second conductive layer disposed on the second surface of the carrier. The first conductive via and at least one of the first conductive layer and the second conductive layer define a first shielding structure surrounding the electronic component. A method of manufacturing a substrate structure is also disclosed.

公开(公告)号：US20210278457A1

公开(公告)日：2021-09-09

申请号：US16812232

申请日：2020-03-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chen-Chao WANG ,  Tsung-Tang TSAI ,  Chih-Yi HUANG

IPC: G01R31/28 ,  H01L23/498 ,  H01L23/538 ,  H01L23/552 ,  H01L23/00 ,  H01L25/18

Abstract: A package structure and a testing method are provided. The package structure includes a wiring structure, a first electronic device and a second electronic device. The wiring structure includes at least one dielectric layer, at least one conductive circuit layer in contact with the dielectric layer, and at least one test circuit structure in contact with the dielectric layer. The test circuit structure is disposed adjacent to the interconnection portion of the conductive circuit layer. The first electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the interconnection portion of the conductive circuit layer.

公开(公告)号：US20210273315A1

公开(公告)日：2021-09-02

申请号：US16806460

申请日：2020-03-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hung-Hsiang CHENG

IPC: H01Q1/22 ,  H01L23/538 ,  H01L23/31 ,  H01L23/66 ,  H01L23/552 ,  H01L25/065 ,  H01L21/683

Abstract: The present disclosure provides a semiconductor device package. The semiconductor device package includes a first substrate having a first surface and a second surface opposite to the first surface, an antenna module disposed on the first surface of the first substrate, an electronic component module disposed on the first surface of the first substrate, and a first package body encapsulating the antenna module and the electronic component module. The antenna module has a first surface facing the first surface of the first substrate, a second surface opposite to the first surface of the antenna module, and a lateral surface extending between the first surface of the antenna module and the second surface of the antenna module. The lateral surface of the antenna module faces the electronic component module. A method of manufacturing a semiconductor device package is also provided.

公开(公告)号：US11108131B2

公开(公告)日：2021-08-31

申请号：US16538592

申请日：2019-08-12

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shao-En Hsu ,  Huei-Shyong Cho ,  Shih-Wen Lu

IPC: H01Q1/22 ,  H01Q9/04 ,  H01Q1/38 ,  H01L23/66 ,  H01L23/31

Abstract: A semiconductor device package includes a substrate, a first antenna and a second antenna. The substrate has a first surface and a second surface opposite to the first surface. The first antenna pattern is disposed over the first surface of the substrate. The first antenna pattern has a first bandwidth. The first antenna pattern has a first port configured to generate a magnetic field. The second antenna pattern is disposed over the first surface of the substrate. The second antenna pattern has a second bandwidth different from the first bandwidth. A prolonged line of an edge of the first antenna pattern parallel to the magnetic field generated by the first port of the first antenna pattern is spaced apart from the second antenna pattern.

公开(公告)号：US11107881B2

公开(公告)日：2021-08-31

申请号：US16395156

申请日：2019-04-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shao Hsuan Chuang ,  Huang-Hsien Chang ,  Min Lung Huang ,  Yu Cheng Chen ,  Syu-Tang Liu

IPC: H01L49/02

Abstract: The subject application relates to a semiconductor package device, which includes a first conductive layer; a semiconductor wall disposed on the first conductive layer; a first conductive wall disposed on the first conductive layer; and an insulation layer disposed on the first conductive layer and between the semiconductor wall and the first conductive wall.

公开(公告)号：US11107777B2

公开(公告)日：2021-08-31

申请号：US16420079

申请日：2019-05-22

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Guo-Cheng Liao ,  Yi Chuan Ding

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/31

Abstract: A substrate structure includes a substrate body, a bottom circuit layer, a first bottom protection structure and a second bottom protection structure. The substrate body has a top surface and a bottom surface opposite to the top surface. The bottom circuit layer is disposed adjacent to the bottom surface of the substrate body, and includes a plurality of pads. The first bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. The second bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. A second thickness of the second bottom protection structure is greater than a first thickness of the first bottom protection structure.

公开(公告)号：US20210265311A1

公开(公告)日：2021-08-26

申请号：US16796921

申请日：2020-02-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen-Long LU ,  Min Lung HUANG

IPC: H01L25/065 ,  H01L23/538 ,  H01L25/00 ,  H01L21/48 ,  H01L23/31

Abstract: A semiconductor device package includes a first substrate and a second substrate arranged above the first substrate. A first connector is disposed on the first substrate, and a first conductor passes through the second substrate and connects to the first connector.