公开(公告)号：US11721884B2

公开(公告)日：2023-08-08

申请号：US17222875

申请日：2021-04-05

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Guo-Cheng Liao ,  Yi Chuan Ding

IPC分类号： H01Q1/22 ,  H01Q1/38 ,  H01L21/48 ,  H01L23/498 ,  H01L23/66

CPC分类号： H01Q1/2283 ,  H01L21/48 ,  H01L21/4853 ,  H01L23/498 ,  H01L23/49816 ,  H01L23/66 ,  H01Q1/22 ,  H01Q1/38 ,  H01L2223/6677

摘要： A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.

公开(公告)号：US11296001B2

公开(公告)日：2022-04-05

申请号：US16592543

申请日：2019-10-03

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Guo-Cheng Liao ,  Yi Chuan Ding

IPC分类号： H01L23/31 ,  H01L25/065 ,  H01L23/498 ,  H01L23/544

摘要： A package substrate includes a first dielectric layer, a first patterned conductive layer and a first set of alignment marks. The first patterned conductive layer is disposed on the first dielectric layer. The first set of alignment marks is disposed on the first dielectric layer and adjacent to a first edge of the first dielectric layer. The first set of alignment marks includes a plurality of alignment marks. Distances between the alignment marks of the first set of alignment marks and the first edge are different from each other.

公开(公告)号：US10971798B2

公开(公告)日：2021-04-06

申请号：US16375640

申请日：2019-04-04

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Guo-Cheng Liao ,  Yi Chuan Ding

IPC分类号： H01Q1/38 ,  H01Q1/22 ,  H01L23/66 ,  H01L21/48 ,  H01L23/498

摘要： A semiconductor device package is provided that includes a substrate, a first support structure disposed on the substrate and a first antenna. The first support structure includes a first surface spaced apart from the substrate by a first distance. The first antenna is disposed above the first surface of the first support structure. The first antenna has a first surface, a second surface opposite the first surface and a third surface extending from the first surface to the second surface, wherein the first surface and the second surface of the first antenna are exposed.

公开(公告)号：US09117697B2

公开(公告)日：2015-08-25

申请号：US14303371

申请日：2014-06-12

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Chun-Che Lee ,  Yuan-Chang Su ,  Wen-Chi Cheng ,  Guo-Cheng Liao ,  Yi-Chuan Ding

IPC分类号： H01L23/52 ,  H01L21/44 ,  H01L23/00

CPC分类号： H01L24/11 ,  H01L23/13 ,  H01L23/498 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/11019 ,  H01L2224/11622 ,  H01L2224/1163 ,  H01L2224/13147 ,  H01L2224/14104 ,  H01L2224/16225 ,  H01L2924/12042 ,  H05K3/108 ,  H05K3/3436 ,  H05K3/4007 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2201/09045 ,  H05K2201/10674 ,  H05K2203/0723 ,  H05K2203/1461 ,  H01L2924/00

摘要： The present disclosure relates to a semiconductor substrate and a method for making the same. The semiconductor substrate includes an insulation layer, a first circuit layer, a second circuit layer, a plurality of conductive vias and a plurality of bumps. The first circuit layer is embedded in a first surface of the insulation layer, and exposed from the first surface of the insulation layer. The second circuit layer is located on a second surface of the insulation layer and electrically connected to the first circuit layer through the conductive vias. The bumps are directly located on part of the first circuit layer, where the lattice of the bumps is the same as that of the first circuit layer.

摘要翻译： 本公开涉及一种半导体衬底及其制造方法。 半导体衬底包括绝缘层，第一电路层，第二电路层，多个导电通孔和多个凸块。 第一电路层嵌入绝缘层的第一表面，并从绝缘层的第一表面露出。 第二电路层位于绝缘层的第二表面上，并通过导电通孔与第一电路层电连接。 凸块直接位于第一电路层的一部分上，其中凸块的晶格与第一电路层的晶格相同。

公开(公告)号：US11217509B2

公开(公告)日：2022-01-04

申请号：US16749586

申请日：2020-01-22

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Jyun-Chi Jhan ,  Guo-Cheng Liao

IPC分类号： H01L23/495 ,  H01L23/00 ,  H01L23/31

摘要： Present disclosure provides a lead frame, including a die paddle and a plurality of leads surrounding the die paddle. Each of the leads including a finger portion proximal to the die paddle and a lead portion distal from the die paddle. The finger portion includes a main body and at least one support structure. The respective support structures on adjacent leads are mutually isolated, and a distance between the support structure and the die paddle is smaller than a distance between the lead portion and the die paddle. A semiconductor package structure including the lead frame described herein and a semiconductor package assembly including the semiconductor package structure described herein are also provided.

公开(公告)号：US11107777B2

公开(公告)日：2021-08-31

申请号：US16420079

申请日：2019-05-22

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Guo-Cheng Liao ,  Yi Chuan Ding

IPC分类号： H01L23/00 ,  H01L23/498 ,  H01L23/31

摘要： A substrate structure includes a substrate body, a bottom circuit layer, a first bottom protection structure and a second bottom protection structure. The substrate body has a top surface and a bottom surface opposite to the top surface. The bottom circuit layer is disposed adjacent to the bottom surface of the substrate body, and includes a plurality of pads. The first bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. The second bottom protection structure is disposed on the bottom surface of the substrate body, and covers a portion of the bottom circuit layer. A second thickness of the second bottom protection structure is greater than a first thickness of the first bottom protection structure.

公开(公告)号：US09978705B2

公开(公告)日：2018-05-22

申请号：US15222873

申请日：2016-07-28

申请人： ADVANCED SEMICONDUCTOR ENGINEERING, INC.

发明人： Guo-Cheng Liao ,  Chia-Ching Chen ,  Yi-Chuan Ding

IPC分类号： H01L23/48 ,  H01L23/00 ,  H05K3/00 ,  H01L23/498 ,  H01L21/48 ,  H05K3/20 ,  H05K3/46

CPC分类号： H01L24/16 ,  H01L21/486 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/08238 ,  H01L2224/10175 ,  H01L2224/11436 ,  H01L2224/11462 ,  H01L2224/1161 ,  H01L2224/13008 ,  H01L2224/13021 ,  H01L2224/13026 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13561 ,  H01L2224/13647 ,  H01L2224/16012 ,  H01L2224/16013 ,  H01L2224/16014 ,  H01L2224/16105 ,  H01L2224/16108 ,  H01L2224/16235 ,  H01L2224/16503 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81139 ,  H01L2224/81193 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2924/3841 ,  H05K3/007 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/09509 ,  H05K2201/10378 ,  H05K2201/10674 ,  H01L2924/00014 ,  H01L2924/00012

摘要： A semiconductor package structure includes a substrate, a semiconductor chip, and a solder material. The substrate includes an insulating layer, a conductive circuit layer, and a conductive bump. The conductive circuit layer is recessed from a top surface of the insulating layer. The conductive circuit layer includes a pad, and a side surface of the pad extends along a side surface of the insulating layer. The conductive bump is disposed on the pad. A side surface of the conductive bump, a top surface of the pad and the side surface of the insulating layer together define an accommodating space. A solder material electrically connects the conductive bump and the semiconductor chip. A portion of the solder material is disposed in the accommodating space.

公开(公告)号：US11670836B2

公开(公告)日：2023-06-06

申请号：US17084487

申请日：2020-10-29

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Ting Ruei Chen ,  Hung-Hsiang Cheng ,  Guo-Cheng Liao ,  Yun-Hsiang Tien

IPC分类号： H01Q1/22 ,  H01Q1/36 ,  H01L23/66 ,  H01L23/538 ,  H01Q19/10

CPC分类号： H01Q1/2283 ,  H01L23/5385 ,  H01L23/66 ,  H01Q1/36 ,  H01Q19/104 ,  H01L2924/1421

摘要： A semiconductor device package includes a substrate, an air cavity, a radiator, and a director. The substrate has a top surface. The air cavity is disposed within the substrate. The air cavity has a first sidewall and a second sidewall opposite to the first sidewall. The radiator is disposed adjacent to the first sidewall of the air cavity. The director is disposed adjacent to the second sidewall of the air cavity.

公开(公告)号：US11362049B2

公开(公告)日：2022-06-14

申请号：US16732163

申请日：2019-12-31

申请人： Advanced Semiconductor Engineering, Inc.

发明人： Guo-Cheng Liao ,  Yi Chuan Ding

IPC分类号： H01L23/66 ,  H01L23/528 ,  H01L23/00

摘要： A semiconductor device package includes a first surface and a second surface opposite to the first surface. The semiconductor device package further includes a first supporting structure disposed on the first surface of the substrate and a second supporting structure disposed on the first surface of the substrate. The first supporting structure has a first surface spaced apart from the first surface of the substrate by a first distance. The second supporting structure has a first surface spaced apart from the first surface of the substrate by a second distance. The second distance is different from the first distance. The semiconductor device package further includes a first antenna disposed above the first surface of the substrate. The first antenna is supported by the first surface of the first supporting structure and the first surface of the second supporting structure.

公开(公告)号：US09437565B2

公开(公告)日：2016-09-06

申请号：US14586735

申请日：2014-12-30

申请人： ADVANCED SEMICONDUCTOR ENGINEERING, INC.

发明人： Guo-Cheng Liao ,  Chia-Ching Chen ,  Yi-Chuan Ding

IPC分类号： H01L23/52 ,  H01L23/00

CPC分类号： H01L24/16 ,  H01L21/486 ,  H01L23/49811 ,  H01L23/49827 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L2224/0401 ,  H01L2224/05025 ,  H01L2224/08238 ,  H01L2224/10175 ,  H01L2224/11436 ,  H01L2224/11462 ,  H01L2224/1161 ,  H01L2224/13008 ,  H01L2224/13021 ,  H01L2224/13026 ,  H01L2224/13027 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13561 ,  H01L2224/13647 ,  H01L2224/16012 ,  H01L2224/16013 ,  H01L2224/16014 ,  H01L2224/16105 ,  H01L2224/16108 ,  H01L2224/16235 ,  H01L2224/16503 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81139 ,  H01L2224/81193 ,  H01L2224/81447 ,  H01L2224/81815 ,  H01L2224/83104 ,  H01L2924/01029 ,  H01L2924/0105 ,  H01L2924/014 ,  H01L2924/3841 ,  H05K3/007 ,  H05K3/205 ,  H05K3/4682 ,  H05K2201/09509 ,  H05K2201/10378 ,  H05K2201/10674 ,  H01L2924/00014 ,  H01L2924/00012

摘要： The present disclosure relates to a semiconductor package structure including a semiconductor substrate, a semiconductor chip and a conductive material. The semiconductor substrate includes an insulating layer, a conductive circuit layer and a conductive bump. The conductive circuit layer is recessed from the top surface of the insulating layer, and includes at least one pad. The conductive bump is disposed on the at least one pad. A side surface of the conductive bump, a top surface of the at least one pad and a side surface of the insulating layer together define an accommodating space. The conductive material is electrically connected the conductive bump and the semiconductor chip, and a portion of the conductive material is disposed in the accommodating space.

摘要翻译： 本公开涉及包括半导体衬底，半导体芯片和导电材料的半导体封装结构。 半导体衬底包括绝缘层，导电电路层和导电凸块。 导电电路层从绝缘层的顶表面凹入，并且包括至少一个焊盘。 导电凸块设置在至少一个垫上。 导电凸块的侧表面，至少一个焊盘的顶表面和绝缘层的侧表面一起限定了容纳空间。 导电材料与导电凸块和半导体芯片电连接，导电材料的一部分设置在容纳空间中。