Abstract:
A field emitter cell includes a thin-film-edge emitter normal to the gate layer. The field emitter cell may include a conductive substrate layer, an insulator layer having a perforation, a gate layer having a perforation, an emitter layer, and other optional layers. The perforation in the gate layer is larger and concentrically offset with respect to the perforation in the insulating layer and may be of a tapered construction. Alternatively, the perforation in the gate layer may be coincident with, or larger or smaller than, the perforation in the insulating layer, provided that the gate layer is shielded from the emitter from a direct line-of-sight by a nonconducting standoff layer. Optionally, the thin-film-edge emitter may include incorporated nanofilaments. The field emitter cell has low gate current making it useful for various applications such as field emitter displays, high voltage power switching, microwave, RF amplification and other application that require high emission currents.
Abstract:
A field emission display device (1) includes a cathode plate (20), a resistive buffer (30) in contact with the cathode plate, a plurality of electron emitters (40) formed on the buffer and an anode plate (50) spaced from the buffer. Each electron emitter includes a rod-shaped first part (401) and a conical second part (402). The buffer and first parts are made from silicon oxide (SiOx). The combined buffer and first parts has a gradient distribution of electrical resistivity such that highest electrical resistivity is nearest the cathode plate and lowest electrical resistivity is nearest the anode plate. The second parts are made from molybdenum. When emitting voltage is applied between the cathode and anode plates, electrons emitted from the second parts traverse an interspace region and are received by the anode plate. Because of the gradient distribution of electrical resistivity, only a very low emitting voltage is needed.
Abstract:
A field emitter cell includes a thin-film-edge emitter normal to the gate layer. The field emitter cell may include a conductive substrate layer, an insulator layer having a perforation, a gate layer having a perforation, an emitter layer, and other optional layers. The perforation in the gate layer is larger and concentrically offset with respect to the perforation in the insulating layer and may be of a tapered construction. Alternatively, the perforation in the gate layer may be coincident with, or larger or smaller than, the perforation in the insulating layer, provided that the gate layer is shielded from the emitter from a direct line-of-sight by a nonconducting standoff layer. Optionally, the thin-film-edge emitter may include incorporated nanofilaments. The field emitter cell has low gate current making it useful for various applications such as field emitter displays, high voltage power switching, microwave, RF amplification and other applications that require high emission currents.
Abstract:
A field emission type cold cathode device comprises a substrate, and a metal plating layer formed on the substrate, the metal plating layer contains at least one carbon structure selected from a group of fullerenes and carbon nanotubes, the carbon structure is stuck out from the metal plating layer and a part of the carbon structure is buried in the metal plating layer.
Abstract:
An enhanced Spindt-tip field emitter tip and a method for producing the enhanced Spindt-tip field emitter. A thin-film resistive heating element is positioned below the field emitter tip to allow for resistive heating of the tip in order to sharpen the tip and to remove adsorbed contaminants from the surface of the tip. Metal layers of the enhanced field emission device are separated by relatively thick dielectric bilayers, with the metal layers having increased thickness in the proximity of a cylindrical well in which the field emitter tip is deposited. Dielectric material is pulled back from the cylindrical aperture into which the field emitter tip is deposited in order to decrease buildup of conductive contaminants and the possibility of short circuits between metallic layers.
Abstract:
A field emission display device (1) includes a cathode plate (20), a resistive buffer (30) in contact with the cathode plate, a plurality of electron emitters (40) formed on the buffer, and an anode plate (50) spaced from the electron emitters. Each electron emitter includes a rod-shaped first part (401) and a conical second part (402). The buffer and first parts are made from silicon nitride. The combined buffer and first parts has a gradient distribution of electrical resistivity such that highest electrical resistivity is nearest the cathode plate and lowest electrical resistivity is nearest the anode plate. The second parts are made from niobium. When emitting voltage is applied between the cathode and anode plates, electrons emitted from the electron emitters traverse an interspace region and are received by the anode plate. Because of the gradient distribution of electrical resistivity, only a very low emitting voltage is needed.
Abstract:
A method for fabricating a field emission display (FED) with improved junction leakage characteristics is provided. The method includes the formation of a light blocking element between a cathodoluminescent display screen of the FED and semiconductor junctions formed on a baseplate of the FED. The light blocking element protects the junctions from light formed at the display screen and light generated in the environment striking the junctions. Electrical characteristics of the junctions thus remain constant and junction leakage is improved. The light blocking element may be formed as an opaque light absorbing or light reflecting layer. In addition, the light blocking element may be patterned to protect predetermined areas of the baseplate and may provide other circuit functions such as an interconnect layer.
Abstract:
Described herein is a resistor layer for use in field emission display devices and the like, and its method of manufacture. The resistor layer is an amorphous silicon layer doped with nitrogen and phosphorus. Nitrogen concentration in the resistor layer is preferably between about 5 and 15 atomic percent. The presence of nitrogen and phosphorus in the silicon prevents diffusion of Si atoms into metal conductive layers such as aluminum, even up to diffusion and packaging temperatures. The nitrogen and phosphorus also prevent defects from forming at the boundary between the resistor layer and metal conductor. This leads to better control over shorting and improved resistivity in the resistor.
Abstract:
A field emission cathode is provided which includes a substrate and a conductive layer desposed adjacent the substrate. An electrically resistive pillar is disposed adjacent the conductive layer, the resistive pillar having a substantially flat surface spaced from and substantially parallel to the substrate. A layer of diamond is disposed adjacent the surface of the resistive pillar.
Abstract:
A gated filament structure for a field emission display includes a plurality of filaments. Included is a substrate, an insulating layer positioned adjacent to the substrate, and a metal gate layer position adjacent to the insulating layer. The metal gate layer has a plurality of gates, the metal gate layer having an average thickness “s” and a top metal gate layer planar surface that is substantially parallel to a bottom metal gate layer planar surface. The metal gate layer includes a plurality of apertures extending through the gates. Each aperture has an average width “r” along a bottom planar surface of the aperture. Each aperture defines a midpoint plane positioned parallel to and equally distant from the top metal gate layer planar surface and the bottom metal gate layer planar surface. A plurality of filaments are individually positioned in an aperture. Each filament has a filament axis. The intersection of the filament axis and the midpoint plane defines a point “O”. Each filament includes a filament tip terminating at a point “A”. A majority of all filament tips of the display have a length “L” between each filament tip at point A and point O along the filament axis where, L≦(s+r)/2.