公开(公告)号：US10368028B2

公开(公告)日：2019-07-30

申请号：US15725476

申请日：2017-10-05

Applicant: STMicroelectronics (Alps) SAS

Inventor： Serge Hembert

IPC: H04N5/44 ,  G09G5/00

Abstract: A video and/or audio decoder provided with a first terminal for supplying an analog audio and/or video signal, including: a first circuit capable of supplying a digital signal which is an image of said analog signal; a digital-to-analog converter capable of receiving as an input said digital signal; an amplifier coupling a second output terminal of the digital-to-analog converter to the first terminal; and a second circuit capable of comparing a signal representative of the voltage or current level on the first terminal with a reference signal, and of deducing therefrom whether the first terminal is connected or not to an analog input terminal of a video signal display and/or audio signal playing device.

公开(公告)号：US10331530B2

公开(公告)日：2019-06-25

申请号：US15253002

申请日：2016-08-31

Applicant: STMicroelectronics (Alps) SAS

Inventor： Mickael Broutin ,  Benoit Lelievre ,  Nicolas Anquet

IPC: G06F11/00 ,  G06F11/27 ,  G06F11/07 ,  G11C7/24 ,  G11C29/12 ,  G11C29/36

Abstract: Embodiments of the circuits described include a method wherein at least one command signal is activated. The activation of the at least one command signal causes a request to a testing circuit of a memory array to enter a memory test mode. The requested memory test mode permits at least part of the memory array to be read. In response to activation of the at least one command signal, a test control circuit initiates an overwrite sequence to overwrite the data stored in the memory array. The test control circuit enables the memory test mode once the overwrite sequence has been completed.

公开(公告)号：US20190123075A1

公开(公告)日：2019-04-25

申请号：US15792556

申请日：2017-10-24

Applicant: STMicroelectronics, Inc. ,  STMICROELECTRONICS (ALPS) SAS

Inventor： Frederic MORESTIN ,  Alexandre BALMEFREZOL ,  Rui XIAO

IPC: H01L27/146 ,  H04N13/00 ,  H04N5/355 ,  H04N9/04

Abstract: The present disclosure is directed to an image sensor including a pixel array of both range pixels and color pixels. Each range pixel (or range pixel area) may be associated with multiple adjacent color pixels, with each side of the range pixel immediately adjacent to at least two color pixels. The association between the range pixels and the color pixels may be dynamically configurable. The readings of a range pixel(s) and the associated color pixels may be integrated together in the generation of a 3D image.

公开(公告)号：US20190101442A1

公开(公告)日：2019-04-04

申请号：US16151118

申请日：2018-10-03

Applicant: STMicroelectronics (Grenoble 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Pascal Mellot ,  Jean-Jacques Rouger

IPC: G01J1/42 ,  G01J1/44 ,  G06F1/06

Abstract: A method of detecting ambient luminous radiation includes resetting and triggering a counter each time a photodiode illuminated by the ambient luminous radiation reaches a discharge threshold. The counter is then being clocked by a clock signal having a first frequency and delivering a counter output signal. The method further includes generating an AC signal representative of the ambient luminous radiation by converting, from digital to analog, a digital signal obtained from the counter output signal.

公开(公告)号：US10205464B2

公开(公告)日：2019-02-12

申请号：US15235714

申请日：2016-08-12

Applicant: STMicroelectronics (Alps) SAS

Inventor： Serge Hembert

IPC: H04N5/14 ,  H04N9/64 ,  H03M1/66 ,  H04N7/01 ,  H04N19/44 ,  H04N5/04 ,  H04N5/63

Abstract: An analog video signal supply circuit includes a processing circuit that supplies first and second digital video signals. First and second digital-to-analog converters convert digital signals to analog signals. A control circuit controls operation in a first configuration where the first digital video signal is applied to an input of the first digital-to-analog converter and the second digital video signal to an input of the second digital-to-analog converter. The control circuit further controls operation in a second configuration where the first digital video signal is simultaneously applied to the inputs of the first and second digital-to-analog converters.

公开(公告)号：US20180351353A1

公开(公告)日：2018-12-06

申请号：US15607780

申请日：2017-05-30

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics SA

Inventor： Yves Mazoyer ,  Philippe Galy ,  Philippe Sirito-Olivier

IPC: H02H9/04 ,  H02H9/00 ,  H01L27/02 ,  H01L23/62 ,  H01L23/60

Abstract: Electrostatic discharge (ESD) protection is provided by a circuit including a resistor having a first terminal and a second terminal, a zener diode having a cathode terminal directly connected to said first terminal and an anode terminal directly connected to a third terminal, and a clamp diode having a cathode terminal directly connected to said second terminal and an anode terminal directly connected to said third terminal.

公开(公告)号：US20180335481A1

公开(公告)日：2018-11-22

申请号：US16047743

申请日：2018-07-27

Applicant: STMicroelectronics (Alps) SAS

Inventor： Bruno LEDUC ,  Pascal BERNON ,  Stephane CLIN

IPC: G01R31/40 ,  G01R19/165 ,  G01R3/00 ,  G01R15/14

CPC classification number: G01R31/40 ,  G01R3/00 ,  G01R15/14 ,  G01R19/165

Abstract: A circuit includes, in series between a first terminal and a second terminal of application of a power supply voltage, and first and second branches. The first branch includes a first transistor and a first current source coupled to the first transistor. The second branch includes a resistive element, a second transistor coupled to the resistive element and forming a current mirror with the first transistor and a second current source coupled to the second transistor. The resistive element conditions a threshold of detection of a variation of the power supply voltage.

公开(公告)号：US20180301174A1

公开(公告)日：2018-10-18

申请号：US15884229

申请日：2018-01-30

Applicant: STMICROELECTRONICS (ALPS) SAS

Inventor： Patrik Arno

IPC: G11C7/06 ,  G11C7/08 ,  G01R15/14 ,  G06F13/42 ,  G06F1/18

CPC classification number: G11C7/062 ,  G01R15/14 ,  G01R19/0092 ,  G06F1/189 ,  G06F13/4282 ,  G11C7/08

Abstract: A current sense amplifier includes: first and second intermediate nodes coupled to first and second nodes of a sense resistor by a chopper, and to respective branches of a current mirror; a differential amplifier having inputs coupled to the first and second intermediate nodes and adapted to generate first and second voltage signals; and first and second transistors adapted to be controlled by the first and second voltage signals respectively and each having one of its main current conducting nodes coupled to a respective one of the first and second intermediate nodes.

公开(公告)号：US10062961B2

公开(公告)日：2018-08-28

申请号：US15667259

申请日：2017-08-02

Applicant: STMicroelectronics (Alps) SAS ,  STMicroelectronics (Grenoble 2) SAS

Inventor： David Auchere ,  Laurent Marechal ,  Laurent Schwarz ,  Yvon Imbs

IPC: H01L21/00 ,  H01Q1/38 ,  H01L21/48 ,  H01L23/66 ,  H01L23/48 ,  H01L23/498 ,  H01L23/31 ,  H01Q1/22

CPC classification number: H01Q1/38 ,  H01L21/4853 ,  H01L21/486 ,  H01L21/4889 ,  H01L21/52 ,  H01L21/56 ,  H01L23/13 ,  H01L23/3114 ,  H01L23/3128 ,  H01L23/315 ,  H01L23/481 ,  H01L23/498 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/645 ,  H01L23/66 ,  H01L24/16 ,  H01L24/81 ,  H01L2223/6677 ,  H01L2224/16227 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01Q1/2283

Abstract: An electronic device includes a support board having a mounting face and an integrated circuit chip mounted on the mounting face. An encapsulation block embeds the integrated circuit chip, the encapsulation block extending above the integrated circuit chip and around the integrated circuit chip on the mounting face of the support board. The encapsulation block includes a front face with a hole passing through the encapsulation block to uncovering at least part of an electrical contact. A layer made of an electrically conducting material fills the hole to make electrical connection to the electrical contact and further extends over the front face of the encapsulation block.

公开(公告)号：US20180191317A1

公开(公告)日：2018-07-05

申请号：US15393550

申请日：2016-12-29

Applicant: STMicroelectronics (Alps) SAS

Inventor： Vratislav Michal ,  Denis Cottin ,  Patrik Arno ,  Nicolas Marty

IPC: H03F3/45

CPC classification number: H03F3/45071 ,  H03F1/3211 ,  H03F3/45 ,  H03F3/45085 ,  H03F2200/471 ,  H03F2203/45544 ,  H03F2203/45594

Abstract: An embodiment circuit includes a first voltage divider coupled between a first voltage level and a ground potential. The circuit further includes an error amplifier having a first input terminal coupled to a node between a first resistive element and a second resistive element of the first voltage divider. The circuit further includes a second voltage divider coupled between a second voltage level and a reference voltage, wherein a second input terminal of the error amplifier is coupled to a node between a third resistive element and a fourth resistive element of the second voltage divider, and wherein an output voltage of the error amplifier is configured to control a potential difference between the first voltage level and the second voltage level.