-
公开(公告)号：US10318687B2
公开(公告)日：2019-06-11
申请号：US14753439
申请日：2015-06-29
Inventor： Heiko Kalte , Lukas Funke
Abstract: A method for generating FPGA code based on an FPGA model with at least one signal value that is modeled as a constant. A constant is inserted with a predefined signal value in the FPGA model. A switching variable is set in the FPGA model for switching between a normal mode and a calibration mode for the FPGA code. The FPGA code is generated for the FPGA model having the implementation of the constants in the FPGA code, wherein the implementation of the constants when the switching variable is set for normal mode includes the implementation of the constants as a fixed value in the FPGA code, and the implementation of the constants when the switching variable is set for calibration mode includes the implementation of the constants as a modifiable signal value in the FPGA code. A method for calibrating an FPGA model is also provided.
-
公开(公告)号：US20190165996A1
公开(公告)日：2019-05-30
申请号：US15822521
申请日：2017-11-27
Inventor： Matthias KLEMM , Heiko KALTE , Robert POLNAU , Thorsten BREHM , Jochen SAUER , Hans-Juergen MIKS , Robert LEINFELLNER , Ruediger KRAFT , Magnus ASPLUND , Matthias SCHMITZ
Abstract: A method for operating a real-time-capable simulation network having multiple network nodes for computing a simulation model. The network nodes are connected to one another via a serial data bus, and the network nodes exchange data via data bus messages. At least one event-driven task of the simulation model is implemented on a first network node, and a nondeterministic triggering event is detected by a second network node. The second network node communicates the detected triggering event to the first network node and the first network node computes the event-driven task. A fast response time is achieved by the means that a detection signal is sent from the second network node in the form of a multicast data bus message or a broadcast data bus message to multiple network nodes of the simulation network or to all network nodes of the simulation network over the serial data bus.
-
公开(公告)号：US10229531B2
公开(公告)日：2019-03-12
申请号：US14722602
申请日：2015-05-27
Inventor： Carsten Scharfe , Thorsten Pueschl
Abstract: A method and a device for testing a control unit, in which sensor data are transmitted over a network connection to a real or simulated control unit, which data are calculated by a data processing system using simulation, in which the simulation of the sensor data takes place at least in part with at least one graphics processor of at least one graphics processor unit of the data processing system. The simulated sensor data are encoded in image data that are output via a visualization interface to a data conversion unit that simulates a visualization unit connected to the visualization interface. Via the data conversion unit the received image data are converted into packet data containing the sensor data through the network connection to the control unit.
-
公开(公告)号：US10223077B2
公开(公告)日：2019-03-05
申请号：US14863494
申请日：2015-09-24
Inventor： Heiko Kalte , Lukas Funke
Abstract: A method for automatically determining models signals of an FPGA program which are readable from the FPGA with the aid of a readback following an FPGA build, including the following steps: generating an FPGA model and generating an FPGA code from the FPGA model, the method comprising the additional step of an automatic analysis for the purpose of identifying signals which are readable from the FPGA with the aid of a readback, prior to the completion of the step of generating the FPGA code from the FPGA model, and the method comprises the step of outputting signals which are readable from the FPGA with the aid of a readback. A data processing device is also provided for carrying out the method.
-
25.发明授权公开(公告)号：US10191113B2
公开(公告)日：2019-01-29
申请号：US14556830
申请日：2014-12-01
Inventor： Dirk Hasse , Peter Scheibelhut , Robert Polnau
IPC: G01R31/319 , G06F11/26 , G01R31/00
Abstract: An apparatus for testing an electrical component, having a simulation unit for producing a simulation signal, a plurality of test units, and at least one electrical connecting device, whereby the simulation unit and the plurality of test units are connected or connectable to each other in an electrically conductive fashion via the at least one connecting device, and the at least one connecting device has at least one electrical switch device, which is situated to make or break an electrical connection between the plurality of test units.
-
Patent Agency Ranking
公开(公告)号：US10055363B2
公开(公告)日：2018-08-21
申请号：US15151746
申请日：2016-05-11
Inventor： Jochen Sauer , Robert Leinfellner , Matthias Klemm , Thorsten Brehm , Robert Polnau , Matthias Schmitz
IPC: G06F13/00 , G06F13/10 , G06F13/12 , G06F13/20 , G06F13/40 , G06F9/445 , G06F15/78 , G11C8/18 , G06F13/38 , G06F9/4401
CPC classification number: G06F13/102 , G06F9/4411 , G06F9/44505 , G06F13/126 , G06F13/20 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4072 , G06F15/7885 , G11C8/18
Abstract: A method for configuring an interface unit of a computer system with a first processor and a second processor stored in the interface unit. A data link is set up between the first processor and the second processor. A peripheral of the computer system is configured to store input data in an input data channel and to read output data from an output data channel, and the second processor is configured to read the input data from the input data channel and to store output data in the output data channel. A sequence of processor commands for the second processor is created such that a number of subsequences is created.
-
27.发明授权公开(公告)号：US09977417B2
公开(公告)日：2018-05-22
申请号：US14602571
申请日：2015-01-22
Inventor： Olaf Grajetzky
CPC classification number: G05B19/05 , G05B17/02 , G06F17/5022
Abstract: A method and a system for optimizing utilization of a programmable logic element for use in an electronic control unit for vehicles, wherein the programmable logic element has a soft CPU and/or an unused remaining area. A plurality of model variants is generated that reproduce functionality of the control unit, and generate a plurality of soft CPU configurations with differing configuration scope, which occupy an area corresponding to the configuration scope of the programmable logic element, and execute processor-in-the-loop simulations for the plurality of model variants and/or soft CPU configurations after instantiation of the soft CPU corresponding to the soft CPU configuration on a programmable logic element. The profiling data acquired for the soft CPU during the PIL simulation is used with regard to the processing of the input signal for optimizing utilization of the programmable logic element.
-
公开(公告)号：US09971321B2
公开(公告)日：2018-05-15
申请号：US14672836
申请日：2015-03-30
Inventor： Andre Rolfsmeier , Thorsten Hufnagel
IPC: G05B15/02 , G05B19/042
CPC classification number: G05B15/02 , G05B19/0426
Abstract: A method for influencing a control program of a control unit, the control program having a plurality of first functions configured for controlling an actuator. The program code of the control program is examined for the occurrence of function calls, and the branch addresses and return addresses connected with the function calls, and the variables connected with the applicable first functions, are ascertained with the names of the variables and with the applicable memory addresses. The ascertained first functions and variables assigned to the applicable first functions are stored with the connected memory addresses in a first mapping table, and from a comparison of the first mapping table with a second predefined mapping table, function names are assigned to at least a portion of the first functions, and at least one first value of one of the variables is replaced by a second value.
-
公开(公告)号：US20180101501A1
公开(公告)日：2018-04-12
申请号：US15730155
申请日：2017-10-11
Inventor： Sebastian FISCHER , Markus SUEVERN , Thomas GEWERING , Barbara KEMPKES
Abstract: A method for configuring a real or virtual electronic control unit, wherein a control unit software is executed on the control unit, and the control unit software comprises a basic software layer, the basic software layer is configured by a module configuration file by setting values of parameters, the scope of the configurable parameters being defined in a first module definition file which contains the identifiers of the configurable parameters. The first module definition file is replaced by a second module definition file, and a conversion of the first module configuration file into a second module configuration file takes place.
-
公开(公告)号：US09766882B2
公开(公告)日：2017-09-19
申请号：US14794331
申请日：2015-07-08
Inventor： Martin Kronmueller
IPC: G06F9/44 , G05B19/418
CPC classification number: G06F8/70 , G05B19/41885 , G06F9/4492 , G06F9/4494
Abstract: A computer-implemented method for editing data object variants of at least one software tool is described and presented, whereby the data object variants have at least one common software/hardware attribute and in each case a configuration of the attribute. It is possible to react to changing configurations of hardware attributes of different data object variants and thereby to changing matching groups during the editing of a data object variant in that for at least one attribute matching configurations of the attribute in different data object variants are captured and that for the attribute information on matching groups of data object variants is stored with the matching configurations of the attribute.
-
-
-
-
-
-
-
-
-
Search Results
313
records
(took 0.035 seconds)
