公开(公告)号：US10892759B1

公开(公告)日：2021-01-12

申请号：US16794453

申请日：2020-02-19

申请人： AMAZING MICROELECTRONIC CORP.

发明人： Che-Cheng Lee

IPC分类号： H03K19/0185 ,  H03K5/13 ,  H04L12/40 ,  H03K19/20

摘要： A bus driver module with controlled circuit is connected to a controller area network bus for generating a high side output or a low side output, comprising a transition controlled circuit and an output driver. The transition controlled circuit comprises a first pathway controlled unit connected in parallel with a second pathway controlled unit for generating a side switching voltage. The output driver is connected in series with the transition controlled circuit and receives the side switching voltage so as to accordingly generate the output bus signal. Each of the first and second pathway controlled unit comprises a plurality of switches and can be activated depending on an input signal. By controlling the switches of the first or second pathway controlled unit to be sequentially turned on and off successively, the side switching voltage is characterized by a smooth phase transition, low common mode noise and better EMI performances.

公开(公告)号：US20200083703A1

公开(公告)日：2020-03-12

申请号：US16128854

申请日：2018-09-12

申请人： AMAZING MICROELECTRONIC CORP.

发明人： YIMING TSENG

IPC分类号： H02H9/04

摘要： A multi-channel transient voltage suppressor with ultra-low capacitance is provided, which comprises a plurality of diode strings coupled between an ESD bus line and ground, having each diode string coupled to an I/O pin; a power clamp circuit coupled to the ESD bus line; and a first diode having an anode coupled to the power clamp circuit and a cathode coupled to ground. A second diode may be alternatively disposed between the first diode and the diode strings, having an anode coupled to the ground and a cathode coupled to a common anode of the diode strings. By employing the proposed present invention, it is advantageous of reaching an ultra-low capacitance and meanwhile still maintaining a lower layout area of the circuit structure.

公开(公告)号：US20200027873A1

公开(公告)日：2020-01-23

申请号：US16042070

申请日：2018-07-23

申请人： AMAZING MICROELECTRONIC CORP.

发明人： CHIH-WEI CHEN ,  YU-SHU SHEN ,  KUN-HSIEN LIN

IPC分类号： H01L27/02 ,  H01L27/082 ,  H01L23/60

摘要： A transient voltage suppression device with improved electrostatic discharge (ESD) robustness includes a semiconductor substrate having a first conductivity type, a first doped well having a second conductivity type, a first heavily-doped area having the first conductivity type, a second doped well having the second conductivity type, a second heavily-doped area having the first conductivity type, and a first current blocking structure. The first doped well is arranged in the semiconductor substrate. The first heavily-doped area is arranged in the first doped well. The second doped well is arranged in the semiconductor substrate. The second heavily-doped area is arranged in the second doped well. The first current blocking structure is arranged in the semiconductor substrate, spaced from the bottom of the semiconductor substrate, and arranged between the first doped well and the second doped well.

公开(公告)号：US10355144B1

公开(公告)日：2019-07-16

申请号：US16042130

申请日：2018-07-23

申请人： AMAZING MICROELECTRONIC CORP.

发明人： Chih-Ting Yeh ,  Sung-Chih Huang ,  Che-Hao Chuang

IPC分类号： H01L29/866 ,  H01L23/34 ,  H01L27/02 ,  H01L29/06 ,  H01L29/66

摘要： A heat-dissipating Zener diode includes a heavily-doped semiconductor substrate having a first conductivity type, a first epitaxial layer having the first conductivity type, a first heavily-doped area having a second conductivity type, a second epitaxial layer, and a second heavily-doped area having the second conductivity type or the first conductivity type. The first epitaxial layer is formed on the heavily-doped semiconductor substrate. The first heavily-doped area is formed in the first epitaxial layer and spaced from the heavily-doped semiconductor substrate. The second epitaxial layer is formed on the first epitaxial layer and penetrated with a first doped area, and the first doped area has the second conductivity type and contacts the first heavily-doped area. The second heavily-doped area is formed in the first doped area.

公开(公告)号：US09929151B2

公开(公告)日：2018-03-27

申请号：US15467286

申请日：2017-03-23

申请人： AMAZING MICROELECTRONIC CORP.

发明人： Ming-Dou Ker ,  Woei-Lin Wu ,  James Jeng-Jie Peng ,  Ryan Hsin-Chin Jiang

IPC分类号： H01L27/08 ,  H01L29/861 ,  H01L27/02 ,  H01L29/06 ,  H01L29/78 ,  H01L27/06

CPC分类号： H01L27/0814 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0629 ,  H01L27/0924 ,  H01L29/0657 ,  H01L29/0692 ,  H01L29/785 ,  H01L29/861

摘要： A self-balanced diode device includes a substrate, a doped well, at least one first conductivity type heavily doped fin and at least two second conductivity type heavily doped fins. The doped well is arranged in the substrate. The first conductivity type heavily doped fin is arranged in the doped well, arranged in a line along a first direction, and protruded up from a surface of the substrate. The second conductivity type heavily doped fins is arranged in the doped well, arranged in a line along a second direction intersecting the first direction, respectively arranged at two opposite sides of the first conductivity type heavily doped fin, and protruded up from the surface of the substrate. Each second conductivity type heavily doped fin and the first conductivity type heavily doped fin are spaced at a fixed interval.

公开(公告)号：US09786653B1

公开(公告)日：2017-10-10

申请号：US15241469

申请日：2016-08-19

申请人： AMAZING MICROELECTRONIC CORP.

发明人： Ming-Dou Ker ,  Woei-Lin Wu ,  James Jeng-Jie Peng ,  Ryan Hsin-Chin Jiang

IPC分类号： H01L27/02 ,  H01L27/06 ,  H01L27/092 ,  H01L29/861

CPC分类号： H01L27/0814 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0629 ,  H01L27/0924 ,  H01L29/0657 ,  H01L29/0692 ,  H01L29/785 ,  H01L29/861

摘要： A self-balanced diode device includes a substrate, a doped well, at least one first conductivity type heavily doped fin and at least two second conductivity type heavily doped fins. The doped well is arranged in the substrate. The first conductivity type heavily doped fin is arranged in the doped well, arranged in a line along a first direction, and protruded up from a surface of the substrate. The second conductivity type heavily doped fins is arranged in the doped well, arranged in a line along a second direction intersecting the first direction, respectively arranged at two opposite sides of the first conductivity type heavily doped fin, and protruded up from the surface of the substrate. Each second conductivity type heavily doped fin and the first conductivity type heavily doped fin are spaced at a fixed interval.

公开(公告)号：US20160173053A1

公开(公告)日：2016-06-16

申请号：US14641543

申请日：2015-03-09

申请人： AMAZING MICROELECTRONIC CORP.

发明人： TUNG-YANG CHEN

IPC分类号： H03H7/01

CPC分类号： H03H7/0153 ,  H03H11/0405

摘要： A power shunt EMI filter is electrically connected to a power feeding line of a main functional IC and other loads. The main functional IC driven by a power source supplied by the power feeding line generates an output voltage and an output current which are individually involved with an output voltage interference and an output current interference, and a phase difference exits there-in-between. A reference providing circuit generates a reference signal according to the output voltage interference and/or the output current interference. At least one adjust filtering circuit calculates eigenvalues of the output voltage interference and/or the output current interference according to the reference signal, such that the phase difference and amplitudes of the interferences are zero. Thus, an output voltage signal and current signal the load receives are DC signal without interferences.

摘要翻译： 功率并联EMI滤波器电连接到主功能IC的馈电线和其他负载。 由由馈电线供电的电源驱动的主功能IC产生单独涉及输出电压干扰和输出电流干扰的输出电压和输出电流，并且相位差在其间退出。 参考提供电路根据输出电压干扰和/或输出电流干扰产生参考信号。 至少一个调整滤波电路根据参考信号来计算输出电压干扰和/或输出电流干扰的特征值，使得干扰的相位差和振幅为零。 因此，负载接收的输出电压信号和电流信号是没有干扰的直流信号。

公开(公告)号：US20150145557A1

公开(公告)日：2015-05-28

申请号：US14199448

申请日：2014-03-06

申请人： Amazing Microelectronic Corp.

发明人： Tang-Kuei TSENG ,  Chih-Hao CHEN ,  Szu-Hsien WU ,  Ryan Hsin-Chin JIANG

IPC分类号： H03K19/003 ,  H03K19/01 ,  H03K19/0175 ,  H03K19/00

CPC分类号： H03K19/00346 ,  H03K19/0005 ,  H03K19/01 ,  H03K19/017509

摘要： The present invention discloses a serial transmission driving method, wherein a serial transmission driving device (STD) is connected with a first terminal (FT) and a second terminal (ST) of an equivalent load capacitor through a first differential bus (FDB) and a second differential bus (SDB). FDB and SDB are respectively connected with a high-potential terminal (HPT) and a low-potential terminal (LPT) through a first equivalent resistor and a second equivalent resistor. STD receives a trigger signal (TS) appearing during the transition between a turn-on signal (Ton) and a turn-off signal (Toff), generates a first potential (FP) and a second potential (SP) greater than FP according to TS, and respectively applies FP and SP to SDB and FDB. FP and SP fast change the potential of FT to be greater than that of ST. HPT and LPT maintain potentials of FDB and SDB until Toff ends.

摘要翻译： 本发明公开了一种串行传输驱动方法，其中串行传输驱动装置（STD）通过第一差分总线（FDB）与等效负载电容器的第一端子（FT）和第二端子（ST）连接， 第二差分总线（SDB）。 FDB和SDB分别通过第一等效电阻器和第二等效电阻器与高电位端子（HPT）和低电位端子（LPT）连接。 STD接收在导通信号（Ton）和关断信号（Toff）之间的转换期间出现的触发信号（TS），根据下列情况产生大于FP的第一电位（FP）和第二电位（SP） TS，并分别将FP和SP应用于SDB和FDB。 FP和SP快速将FT的潜力更大于ST的潜力。 HPT和LPT保持FDB和SDB的潜力，直到Toff结束。

公开(公告)号：US20140299912A1

公开(公告)日：2014-10-09

申请号：US14309660

申请日：2014-06-19

申请人： Amazing Microelectronic Corp.

发明人： Kun-Hsien LIN ,  Che-Hao CHUANG ,  Ryan Hsin-Chin JIANG

IPC分类号： H01L29/74

CPC分类号： H01L29/7424 ,  H01L27/0262 ,  H01L29/861

摘要： In a silicon-controlled-rectifier (SCR) with adjustable holding voltage, an epitaxial layer is formed on a heavily doped semiconductor layer. A first N-well having a first P-heavily doped area is formed in the epitaxial layer. A first P-well is formed in the epitaxial layer. Besides, a first N-heavily doped area is formed in the first P-well. At least one deep isolation trench is formed in the epitaxial layer, having a depth greater than the depth of the first N-type well and located between the first P-heavily doped area and the first N-heavily doped area. A distance between the deep isolation trench and the heavily doped semiconductor layer is larger than zero.

摘要翻译： 在具有可调保持电压的硅控整流器（SCR）中，在重掺杂半导体层上形成外延层。 在外延层中形成具有第一P重掺杂区的第一N阱。 在外延层中形成第一P阱。 此外，在第一P阱中形成第一N重掺杂区域。 在外延层中形成至少一个深的隔离沟槽，其深度大于第一N型阱的深度并且位于第一P重掺杂区域和第一N重掺杂区域之间。 深隔离沟槽和重掺杂半导体层之间的距离大于零。

公开(公告)号：US20230420576A1

公开(公告)日：2023-12-28

申请号：US17849824

申请日：2022-06-27

申请人： AMAZING MICROELECTRONIC CORP.

发明人： Chih-Wei CHEN ,  Kuan-Yu LIN ,  Kun-Hsien LIN

IPC分类号： H01L29/87 ,  H01L29/06

CPC分类号： H01L29/87 ,  H01L29/0684

摘要： A transient voltage suppression device includes at least one P-type lightly-doped structure and at least one electrostatic discharge structure. The electrostatic discharge structure includes an N-type lightly-doped well, an N-type well, a first P-type heavily-doped area, and a first N-type heavily-doped area. The N-type lightly-doped well is formed in the P-type lightly-doped structure. The N-type well is formed in the N-type lightly-doped well. The doping concentration of the N-type lightly-doped well is less than that of the N-type well. The first P-type heavily-doped area is formed in the N-type well. The first N-type heavily-doped area is formed in the P-type lightly-doped structure.