Abstract:
Systems and methods are provided for controlling headroom of an amplifier (e.g., in a transmitter). A method comprises obtaining a target output power for a current interval and obtaining a target headroom for a subsequent interval. The method continues by adjusting, during the current interval, the power output capability of the amplifier based on the target headroom and adjusting the input power of an input signal based on the target output power, such that the output power of the amplifier is substantially constant during the current interval as the power output capability of the amplifier is adjusted.
Abstract:
Embodiments include transmitters, wireless devices, and methods for performing loop delay and gain control. In a transmitter, a gain application element receives and combines digital input samples and a digital gain signal to generate gain-compensated digital samples. A power amplifier receives and amplifies an analog version of the gain-compensated digital samples to generate an antenna output signal. A feedback path generates an analog feedback signal from the antenna output signal, to produce a sequence of digital feedback samples from the analog feedback signal, and generates the digital gain signal from the sequence of digital feedback samples and a loop gain estimate. A loop delay and gain calculator calculates a loop delay estimate from the gain-compensated digital samples and the sequence of digital feedback samples, and calculates the loop gain estimate using the loop delay estimate, the gain-compensated digital samples, and the sequence of digital feedback samples.
Abstract:
In a wireless 802.15.4 communication system (300), a high-speed data frame structure (340) is provided which uses the 802.15.4 SHR structure that is spread modulated to obtain the synchronization benefits of the 802.15.4 protocol, but which uses a modified data frame structure for the payload portion without using spreading to thereby improve its transmission efficiency. The transmission efficiency can be further increased by increasing the size of the data payload (and correspondingly, the frame length size).
Abstract:
Embodiments of wireless devices and transmitters are provided, which perform embodiments of automatic gain control methods. The embodiments of wireless devices and transmitters include a ramp generator, a digital gain signal generator, a combiner, and a variable gain amplifier. The ramp generator is adapted to receive a gain control input signal and to generate a gain ramp signal based on the gain control input signal. The digital gain signal generator is adapted to generate and incorporate a gain arc into a digital gain signal. A combiner is adapted to receive and combine a digital input signal with the digital gain signal, to generate a pre-compensated digital signal. The variable gain amplifier is adapted to apply gains indicated in the gain ramp signal to a pre-adjusted analog signal, which is generated based on the pre-compensated digital signal, in order to generate a gain-adjusted analog signal.
Abstract:
A hybrid electromechanical actuator has two different types of electromechanical elements, one that expands in a transverse direction when electric power is applied thereto and one that contracts in a transverse direction when electric power is applied thereto. The two electromechanical elements are (i) disposed in relation to one another such that the transverse directions thereof are parallel to one another, and (ii) mechanically coupled to one another at least at two opposing edges thereof. Electric power is applied simultaneously to the elements.
Abstract:
The present invention discloses a single unified decoder for performing both convolutional decoding and turbo decoding in the one architecture. The unified decoder can be partitioned dynamically to perform required decoding operations on varying numbers of data streams at different throughput rates. It also supports simultaneous decoding of voice (convolutional decoding) and data (turbo decoding) streams. This invention forms the basis of a decoder that can decode all of the standards for TDMA, IS-95, GSM, GPRS, EDGE, UMTS, and CDMA2000. Processors are stacked together and interconnected so that they can perform separately as separate decoders or in harmony as a single high speed decoder. The unified decoder architecture can support multiple data streams and multiple voice streams simultaneously. Furthermore, the decoder can be dynamically partitioned as required to decode voice streams for different standards.
Abstract:
A novel concept of ergodynamic desktops with slowly varying configurations for ergonomic purposes is provided. Very slow motions are incorporated into the design of desktops, usually used by computer users. The introduced motion is at such a slow pace that it is hardly noticeable, similar to the adiabatic motions of hour or minute hands on a clock. Users of the desktops are therefore induced to adjust their body posture accordingly in a gradual and healthy manner, while still continuing to perform their normal activities without interruption. These desktop designs allow a natural and effortless combination of normal life and exercise. When used in a working environment, they will be useful to improve the health and to enhance the efficiency of workers.
Abstract:
A graphic card with multiple fans and a controlling method thereof are provided. In the controlling method, the temperature of a first component and a second component of the graphic card is detected. A rotating speed of a first fan of the graphic card is adjusted according to the temperature of the first component. The rotating speed of the second fan of the graphic card is adjusted according to the temperature of the second component or the temperature of the first component and the second component.
Abstract:
An electrical connector assembly includes an insulator, a PCB, first terminals, second terminals, and a FFC. The PCB is inserted in the slot. The PCB includes a first conductive parts embedded in the first slot holes and second conductive parts embedded in the second slot holes. The second terminals comprise first contacting parts and second contact parts. The first contacting parts are electrically connected the second conductive parts of the PCB. The insulator further comprises a cable slot, which connects the second slot holes so that the second contacting parts of the second terminals extend into the cable slot, to which the FFC is inserted in. The ends of the conductors are electrically connected the second contacting parts of the second terminals. Thus the problem with the existing soldering technology is solved since soldering is not needed.
Abstract:
A card edge connector assembly is disclosed. The card edge connector assembly includes an insulating housing, a first circuit board, a line transmission device, and a covering body. A plurality of first terminals and second terminals are inserted into the insulating housing. The first terminals and the second terminals are electrically connected to the line transmission device via the first circuit board. The first terminals are above the second terminals and mating portions of the first terminals and the second terminals stretch into a plug space of the insulating housing. In this way, the plug space can be used for the second circuit board to plug in such that the first terminals and the second terminals are electrically connected to the second circuit board.