Drive current enhancement in tri-gate MOSFETS by introduction of compressive metal gate stress using ion implantation
    21.
    发明申请
    Drive current enhancement in tri-gate MOSFETS by introduction of compressive metal gate stress using ion implantation 审中-公开
    通过使用离子注入引入压缩金属栅极应力来驱动三栅极MOSFET的电流增强

    公开(公告)号:US20110147804A1

    公开(公告)日:2011-06-23

    申请号:US12646673

    申请日:2009-12-23

    IPC分类号: H01L29/78 H01L21/20

    摘要: A semiconductor device comprises a fin and a metal gate film. The fin is formed on a surface of a semiconductor material. The metal gate film formed on the fin and comprises ions implanted in the metal gate film to form a compressive stress within the metal gate. In one exemplary embodiment, the surface of the semiconductor material comprises a (100) crystalline lattice orientation, and an orientation of the fin is along a direction with respect to the crystalline lattice of the semiconductor. In another exemplary embodiment, the surface of the semiconductor material comprises a (100) crystalline lattice orientation, and the orientation of the fin is along a direction with respect to the crystalline lattice of the semiconductor. The fin comprises an out-of-plane compression that is generated by the compressive stress within the metal gate film.

    摘要翻译: 半导体器件包括翅片和金属栅极膜。 翅片形成在半导体材料的表面上。 金属栅极膜形成在翅片上并且包括注入金属栅极膜中的离子,以在金属栅极内形成压应力。 在一个示例性实施例中,半导体材料的表面包括(100)晶格取向,并且鳍的取向相对于半导体的晶格沿着<100>方向。 在另一个示例性实施例中,半导体材料的表面包括(100)晶格取向,鳍的取向相对于半导体的晶格沿着<110>方向。 翅片包括由金属栅膜内的压应力产生的平面外压缩。

    SUB-SECOND ANNEALING PROCESSES FOR SEMICONDUCTOR DEVICES
    24.
    发明申请
    SUB-SECOND ANNEALING PROCESSES FOR SEMICONDUCTOR DEVICES 有权
    用于半导体器件的次二次退火工艺

    公开(公告)号:US20090325392A1

    公开(公告)日:2009-12-31

    申请号:US12164560

    申请日:2008-06-30

    IPC分类号: H01L21/26

    摘要: An annealing method and apparatus for semiconductor manufacturing is described. The method and apparatus allows an anneal that can span a thermal budget and be tailored to a specific process and its corresponding activation energy. In some cases, the annealing method spans a timeframe from about 1 millisecond to about 1 second. An example for this annealing method includes a sub-second anneal method where a reduction in the formation of nickel pipes is achieved during salicide processing. In some cases, the method and apparatus combine the rapid heating rate of a sub-second anneal with a thermally conductive substrate to provide quick cooling for a silicon wafer. Thus, the thermal budget of the sub-second anneal methods may span the range from conventional RTP anneals to flash annealing processes (including duration of the anneal, as well as peak temperature). Other embodiments are described.

    摘要翻译: 描述用于半导体制造的退火方法和装置。 该方法和装置允许可以跨越热预算的退火,并且可以针对具体过程及其对应的激活能量进行定制。 在一些情况下,退火方法跨越约1毫秒至约1秒的时间范围。 该退火方法的一个实例包括二次退火方法,其中在自杀化处理期间实现镍管形成的减少。 在一些情况下,该方法和装置将亚秒级退火的快速加热速率与导热基板相结合,为硅晶片提供快速冷却。 因此,次秒退火方法的热预算可以跨越从常规RTP退火到闪光退火工艺(包括退火的持续时间,以及峰值温度)的范围。 描述其他实施例。

    Implant and anneal amorphization process
    27.
    发明申请
    Implant and anneal amorphization process 审中-公开
    植入和退火非晶化过程

    公开(公告)号:US20070099404A1

    公开(公告)日:2007-05-03

    申请号:US11261843

    申请日:2005-10-28

    IPC分类号: H01L21/265 H01L21/4763

    摘要: A method for improving a microelectronic device interface with an ultra-fast anneal process at an intermediate temperature that may be lower than those used in a dopant activation process. In one embodiment, a partial recrystalization of an amorphous silicon layer in the source drain region that is the precursor to the metal salicide reaction is disclosed. Source/drain regions are first amorphized using an implant process, then a metal layer is deposited in the source/drain region which reacts with the silicon in a salicide formation anneal. Amorphization reduces problems with metal diffusion that can occur during salicide formation anneal process, which typically occurs at a temperature significantly lower than the dopant activation temperature. The partial recrystalization reduces source/drain interfacial roughness, repairs amorphization-related defects, and reactivates dopants previously deactivated during the amorphization implant, thereby reducing the external resistance and leakage, as well as improving mobility and yield.

    摘要翻译: 一种在中间温度下用超快速退火工艺改进微电子器件界面的方法,该中间温度可低于掺杂剂激活过程中使用的那些。 在一个实施例中,公开了作为金属硅化物反应的前体的源极漏极区域中的非晶硅层的部分重结晶。 源极/漏极区域首先使用注入工艺非晶化,然后金属层沉积在源极/漏极区域中,其在硅化物形成退火中与硅反应。 非晶化减少了在自杀化合物形成退火过程中可能发生的金属扩散的问题,其通常发生在显着低于掺杂剂活化温度的温度下。 部分重结晶减少了源极/漏极界面粗糙度,修复了非晶化相关缺陷,并且在非晶化植入期间重新激化先前已去活化的掺杂剂,从而降低了外部电阻和漏电流,同时提高了迁移率和产率。

    Multi-zone reflecting device for use in flash lamp processes
    28.
    发明授权
    Multi-zone reflecting device for use in flash lamp processes 失效
    用于闪光灯工艺的多区域反射装置

    公开(公告)号:US07109443B2

    公开(公告)日:2006-09-19

    申请号:US10815068

    申请日:2004-03-26

    IPC分类号: F27B5/14

    CPC分类号: H01L21/67115 F27B17/0025

    摘要: A method, apparatus, and system including a reflecting device having a plurality of reflecting zones with associated reflectivities for reflecting light from a flash lamp, are described herein.

    摘要翻译: 本文描述了一种包括具有多个反射区域的反射装置的方法,装置和系统,其具有用于反射来自闪光灯的光的相关联的反射率。