Abstract:
The present invention provides a primary-side regulated PWM controller with improved load regulation. In every PWM cycle, a built-in feedback voltage samples and holds a flyback voltage from the auxiliary winding of the transformer via a sampling switch and generates a feedback voltage accordingly. A bias current sink pulls a bias current that is proportional to the feedback voltage. Via a detection resistor, the bias current will produce a voltage drop to compensate the voltage drop of an output rectifying diode as the output load changes. According to the present invention, the bias current can enable the PWM controller to regulate the output voltage very precisely without using a secondary feedback circuit.
Abstract:
The present invention discloses a ZCS discontinuous mode PFC controller having a power saving modulator. The controller turns on through the feedback resistor and the parasitic diode of the controller, thus eliminating the need for a startup resistor. To achieve ZCS, the inductor current is released to zero, while the switching signal is off, before the next switching cycle starts. In order to decrease the switching frequency for light load conditions, an off-time delay is inserted right before the start of every switching cycle. The off-time delay is modulated to be the function of the feedback voltage and supply voltage. When the supply voltage is lower than the limit voltage, the off-time delay will decrease to inhibit the decrease of a switching frequency therefore prevents a low supply voltage. The switching frequency is decreased in accordance with the decrease of the load. Consequently, the switching losses and power consumption for light load and no load conditions are reduced.
Abstract:
A PWM controller having a saw-limiter for power limit without input voltage sensing. The saw-limiter has an adder, a reference voltage, a scaler and a saw-tooth signal that is generated by the PWM oscillator. The saw-limiter produces a saw-limited voltage. The PWM controller will turn off its output when the current-sense input signal of the PWM controller is higher than the saw-limited voltage. The saw-limited voltage is equal to the reference voltage while a PWM switching period starts. After that, the amplitude of the saw-limited voltage will gradually increase until it reaches its maximum voltage. Subsequently, a saw-tooth like waveform is generated for the saw-limited voltage. The slope of the current-sense input signal is proportional to the line voltage. Therefore, a higher line voltage creates a sharp slope for the current-sense input signal, which will be restricted by a lower saw-limited voltage and produces a shorter PWM signal. The PWM signal will be turned off once the voltage of the current sense input signal is higher than the saw limited voltage. In terms of power limit, using the saw-limiter the power limit will be lower when the line voltage is higher. By properly selecting the value of the scaler an identical output power limit for the low line and high line voltage input can be achieved.
Abstract:
An adaptive off-time modulator of a PWM controller is provided for power saving in the light-load and no-load conditions. The maximum on-time is kept as a constant and a bias current of the oscillator in the PWM controller is moderated to achieve the off-time modulation. Reduction of the bias current increases the off-time of the switching period. The bias current is a function of the supply voltage and the feedback voltage, which is derived from a voltage feedback loop. A threshold voltage defines the level of the light load. A limit voltage defines the low level of the supply voltage. A bias current synthesizer generates the bias current. Once the feedback voltage is decreased lower than the threshold voltage, the bias current is reduced linearly and the off-time of the switching period is increased gradually. When the supply voltage is lower than the limit voltage, the bias current increases and determines a maximum off-time of the switching period. The maximum on-time and off-time of the switching period determines the PWM frequency. As the limit voltage varies in every switching cycle, the frequency spectrum of PWM signal spreads in light-load and no-load conditions; and therefore, the acoustic noise is suppressed. The feedback voltage and the supply voltage determine the switching period of the PWM signal. The maximum on-time is kept constant and the switching period is increased by increasing the off-time, such that the magnetic components, such as inductors and transformers, are prevented from being saturated.
Abstract:
A switching regulator of a power converter is provided and includes a feedback-input circuit, a programming circuit, and a peak-current-threshold circuit. The feedback-input circuit is coupled to a terminal of the switching regulator for receiving a feedback signal. The feedback-input circuit is operated in a first range of a terminal signal. The programming circuit is coupled to the terminal for generating a programming signal. The programming signal is operated in a second range of the feedback signal. The peak-current-threshold circuit generates a threshold signal in accordance with the programming signal. The feedback signal is coupled to regulate the output of the power converter, and the threshold signal is coupled to limit a peak switching current of the power converter.
Abstract:
A control circuit of a power converter for light-load power saving according to the present invention comprises a first feedback circuit coupled to an output voltage of the power converter to receive a first feedback signal. A second feedback circuit is coupled to the output voltage to receive a second feedback signal. A control circuit generates a switching signal for switching a transformer of the power converter and regulating the output voltage of the power converter in response to the first feedback signal and the second feedback signal. The switching signal is generated in accordance with the first feedback signal when an output load is high. The switching signal is generated in accordance with the second feedback signal during a light-load condition.
Abstract:
A wall control interface for power management includes a transmitting circuit that generates a switching signal to control a switch and achieve a phase modulation to a power line signal in response to a transmitting-data. A receiving circuit is coupled to detect the phase of the power line signal for generating a data signal and a receiving-data in response to the phase of the power line signal. The receiving circuit further generates a control signal to control power of a load in accordance with the data signal or the receiving-data. The phase modulation is achieved by controlling a turn-on angle of the power line signal. The switch remains in a turn-on state during the normal condition, which achieves good power and low current harmonic. The phase modulation is only performed during the communication of the power management.
Abstract:
A switching controller for parallel power converters is disclosed. The switching controller includes an input circuit coupled to an input terminal of the switching controller to receive an input signal. An integration circuit is coupled to the input circuit to generate an integration signal in response to the pulse width of the input signal. A control circuit generates a switching signal for switching the power converters. The switching signal is enabled in response to the enabling of the input signal. A programmable delay time is generated between the input signal and the switching signal. The pulse width of the switching signal is determined in response to the integration signal.
Abstract:
A power supply system is introduced herein. The power supply system includes a power converter to supply a power source to an electronic circuit through an output cable of the power supply. A communication unit is coupled to the output cable of the power supply to develop a communication channel between the power converter and the electronic circuit in order to report the status of the power converter to the electronic circuit.
Abstract:
An electrostatic discharge (ESD) device with a parasitic silicon controlled rectifier (SCR) structure and controllable holding current is provided. A first distance is kept between a first N+ doped region and a first P+ doped region, and a second distance is kept between a second P+ doped region and a third N+ doped region. In addition, the holding current of the ESD device can be set to a specific value by modulating the first distance and the second distance. The holding current is in inverse proportion to the first distance and the second distance.