公开(公告)号：US6040655A

公开(公告)日：2000-03-21

申请号：US64639

申请日：1993-05-21

Applicant: Takeshi Mera ,  Satoru Endo ,  Mitsuhiro Sugiyama

Inventor： Takeshi Mera ,  Satoru Endo ,  Mitsuhiro Sugiyama

IPC: H01J9/14 ,  H01J29/48 ,  H01J29/46

CPC classification number: H01J29/485 ,  H01J9/14 ,  H01J2229/4824

Abstract: A cathode-ray tube having an electron gun which includes an electrode plate (E) in which a portion having three beam passage holes (H) and a portion having bead supports (S) are formed as a unitary or one piece structure, the two portions having different thicknesses (T.sub.1, T.sub.2), and the steps being inclinedly formed along the boundaries of the two portions. Since the portion having beam passage holes and the portion having bead supports are formed as a unitary or one piece structure easily and highly precisely in the electrode plate, the conventionally employed process of welding can be omitted, and thereby the productivity is raised and the manufacturing cost is decreased. Moreover, use of the material having the steps formed in advance contributes to increasing the productivity and preventing the machining tools from being damaged during the press-forming.

Abstract translation: 一种具有电子枪的阴极射线管，其包括电极板（E），其中具有三个光束通过孔（H）的部分和具有珠支撑件（S）的部分形成为一体或一体结构， 具有不同厚度（T1，T2）的部分，并且沿两个部分的边界倾斜地形成台阶。 由于具有光束通过孔的部分和具有焊道支撑部分的部分在电极板中容易且高度精确地形成为整体或单件结构，因此可以省略常规使用的焊接工艺，从而提高生产率并且制造 成本下降。 此外，预先形成的步骤的材料的使用有助于提高生产率，并且防止加工工具在压制成形期间被损坏。

公开(公告)号：US5994199A

公开(公告)日：1999-11-30

申请号：US623510

申请日：1996-03-28

Applicant: Mitsuhiro Sugiyama

Inventor： Mitsuhiro Sugiyama

IPC: H01L21/76 ,  H01L21/762

CPC classification number: H01L21/7624 ,  H01L21/76267 ,  H01L21/76283

Abstract: A semiconductor device includes a plurality of single crystal semiconductor island layers formed on a semiconductor substrate with a first insulating layer intervened therebetween, the single crystal semiconductor island layers being isolated from one another by a second insulating layer. In forming the single crystal semiconductor island layers, a single crystal semiconductor layer is formed and is selectively removed on the first insulating layer. The second insulating layer is buried between adjacent ones of the single crystal semiconductor island layers. The second insulating layer is formed over the entire surface inclusive of the single crystal semiconductor island layers and a surface portion of the second insulating layer is removed by an etching process or a polishing process. Since the non-element regions are buried by the second insulating layer and the single crystal semiconductor island layers are completely isolated from one another, the substrate-related capacitances such as those at wiring regions and resistive parts are reduced.

Abstract translation: 半导体器件包括形成在半导体衬底上的多个单晶半导体岛层，其中介于其间的第一绝缘层，单晶半导体岛层通过第二绝缘层彼此隔离。 在形成单晶半导体岛层时，形成单晶半导体层，并在第一绝缘层上选择性地除去。 第二绝缘层被埋在相邻的单晶半导体岛层之间。 在包括单晶半导体岛层的整个表面上形成第二绝缘层，并且通过蚀刻工艺或抛光工艺除去第二绝缘层的表面部分。 由于非元件区域被第二绝缘层掩埋并且单晶半导体岛层彼此完全隔离，所以与布线区域和电阻部件相关的衬底相关电容减小。

公开(公告)号：US5633190A

公开(公告)日：1997-05-27

申请号：US711926

申请日：1996-09-11

Applicant: Mitsuhiro Sugiyama

Inventor： Mitsuhiro Sugiyama

IPC: H01L21/76 ,  H01L21/306 ,  H01L21/331 ,  H01L21/84 ,  H01L27/12

CPC classification number: H01L29/66265 ,  H01L21/84 ,  H01L27/1203

Abstract: Disclosed is a semiconductor device in which dummy regions which are lower than an isolated element region are formed around the isolated element region. Another dummy region which has a height nearly equal to those of element regions may be formed at a non-element-region-existing region, accompanying with lower dummy regions. The method for making the semiconductor device has the steps of suitably forming the element regions and dummy regions on a insulating layer on a substrate, depositing a insulator on the entire surface of the insulating layer and polishing the insulator to obtain a plane surface.

Abstract translation: 公开了一种半导体器件，其中在隔离元件区域周围形成了低于隔离元件区域的虚拟区域。 伴随着较低的虚拟区域，可以在非元件区域存在的区域形成高度几乎等于元件区域的高度的虚拟区域。 制造半导体器件的方法具有在衬底上的绝缘层上适当地形成元件区域和虚设区域的步骤，在绝缘层的整个表面上沉积绝缘体并抛光绝缘体以获得平面。

公开(公告)号：US5522750A

公开(公告)日：1996-06-04

申请号：US450707

申请日：1995-05-25

Applicant: Takeshi Mera ,  Satoru Endo ,  Mitsuhiro Sugiyama

Inventor： Takeshi Mera ,  Satoru Endo ,  Mitsuhiro Sugiyama

IPC: H01J9/14 ,  H01J29/48

CPC classification number: H01J29/485 ,  H01J9/14 ,  H01J2229/4824

Abstract: A cathode-ray tube having an electron gun which includes an electrode plate (E) in which a portion having three beam passage holes (H) and a portion having bead supports (S) are formed as a unitary structure, the two portions having different thicknesses (T.sub.1, T.sub.2), and the steps being inclinedly formed along the boundaries of the two portions. Since the portion having beam passage holes and the portion having bead supports are formed as a unitary structure easily and highly precisely in the electrode plate, the conventionally employed process of welding can be omitted, and thereby the productivity is raised and the manufacturing cost is decreased. Moreover, use of the material having the steps formed in advance contributes to increasing the productivity and preventing the machining tools from being damaged during the press-forming.

Abstract translation: 一种具有电子枪的阴极射线管，其包括电极板（E），其中具有三个光束通过孔（H）的部分和具有珠支撑体（S）的部分形成为一体结构，所述两个部分具有不同的 厚度（T1，T2），并且沿两个部分的边界倾斜地形成台阶。 由于具有光束通过孔的部分和具有焊道支撑部分的部分在电极板中容易且高度精确地形成为一体结构，所以可以省略常规使用的焊接工艺，从而提高生产率并降低制造成本 。 此外，预先形成的步骤的材料的使用有助于提高生产率，并且防止加工工具在压制成形期间被损坏。

公开(公告)号：US5099304A

公开(公告)日：1992-03-24

申请号：US448076

申请日：1989-12-08

Applicant: Hisashi Takemura ,  Mitsuhiro Sugiyama

Inventor： Hisashi Takemura ,  Mitsuhiro Sugiyama

IPC: H01L21/76 ,  H01L21/763

CPC classification number: H01L21/763

Abstract: A semiconductor device comprising an insulating isolation groove which comprises a groove in a substrate, an insulating film on the inner surface of the groove, a polycrystal silicon film and a boron phosphosilicate glass film in order embedded within the groove, and a silicon oxide film on the boron phosphosilicate glass film.Since the polycrystal silicon film and boron phosphosilicate glass film are embedded within the groove, the crystal defect due to thermal expansion does not occur. And, since it is not necessary to oxidize the surface of the polycrystal silicon film within the groove, deformation due to an increased build-up at the time of oxidation does not occur.

Abstract translation: 一种半导体器件，包括绝缘隔离槽，其包括衬底中的凹槽，凹槽内表面上的绝缘膜，多晶硅膜和硼磷硅酸盐玻璃膜，以及嵌入在沟槽内的氧化硅膜 硼磷硅酸盐玻璃膜。 由于多晶硅膜和硼磷硅酸盐玻璃膜嵌入槽内，所以不会发生由热膨胀引起的晶体缺陷。 并且，由于不需要在槽内氧化多晶硅膜的表面，所以不会发生氧化时的聚集增加引起的变形。

公开(公告)号：US20120082074A1

公开(公告)日：2012-04-05

申请号：US13249245

申请日：2011-09-30

Applicant: Mitsuhiro SUGIYAMA

Inventor： Mitsuhiro SUGIYAMA

IPC: H04W88/02

CPC classification number: H04B1/036 ,  H04B1/38

Abstract: A radio communication device includes a mounting substrate and a shielding case to cover circuits mounted on the substrate. A first surface of the substrate includes an input/output area where a transmitting/receiving unit of an RF signal is mounted, an amplification area where an amplifying unit to amplify the RF signal from the transmitting/receiving unit is mounted, an RF area where an RF processing unit to process the. RF signal is mounted, and a baseband area where a baseband processing unit to process a baseband signal is mounted. A second surface of the substrate includes a crystal oscillator arranged to generate a reference clock signal which is supplied to the RF processing unit and the baseband processing unit.

Abstract translation: 无线电通信装置包括安装基板和屏蔽壳，以覆盖安装在基板上的电路。 衬底的第一表面包括安装有RF信号的发送/接收单元的输入/输出区域，放大区域，放大单元用于放大来自发送/接收单元的RF信号，RF区域 一个RF处理单元来处理。 安装RF信号，并且安装用于处理基带信号的基带处理单元的基带区域。 衬底的第二表面包括晶体振荡器，其被配置为产生提供给RF处理单元和基带处理单元的参考时钟信号。

公开(公告)号：US20050059370A1

公开(公告)日：2005-03-17

申请号：US10884078

申请日：2004-07-02

Applicant: Mitsuhiro Sugiyama ,  Hayato Shibano ,  Toshikazu Ogino ,  Kiminori Nakamura

Inventor： Mitsuhiro Sugiyama ,  Hayato Shibano ,  Toshikazu Ogino ,  Kiminori Nakamura

IPC: H04B1/16 ,  H04B1/18 ,  H04H40/18 ,  H04N5/44 ,  H04B17/02 ,  H04B1/10

CPC classification number: H04B1/16 ,  H04H40/18

Abstract: In a broadcast receiving system, a first antenna receives a broadcast signal of a first frequency band and a second antenna receives a signal of a second frequency band different from the first frequency band. A frequency conversion unit converts the signal of the second frequency band into a second signal of the first frequency band. A selection unit selects one of the broadcast signal output from the first antenna and the second signal output from the frequency conversion unit. A demodulation unit demodulates the one of the broadcast signal and the second signal selected by the selection unit.

Abstract translation: 在广播接收系统中，第一天线接收第一频带的广播信号，第二天线接收与第一频带不同的第二频带的信号。 频率转换单元将第二频带的信号转换为第一频带的第二信号。 选择单元选择从第一天线输出的广播信号和从频率转换单元输出的第二信号之一。 解调单元解调由选择单元选择的广播信号和第二信号之一。

公开(公告)号：US5747860A

公开(公告)日：1998-05-05

申请号：US613077

申请日：1996-03-08

Applicant: Mitsuhiro Sugiyama ,  Tsutomu Tashiro

Inventor： Mitsuhiro Sugiyama ,  Tsutomu Tashiro

IPC: G02B6/42 ,  H01L31/0232 ,  H01L31/0352 ,  H01L31/103 ,  H01L31/18

CPC classification number: B82Y20/00 ,  G02B6/42 ,  G02B6/4212 ,  G02B6/423 ,  H01L31/0232 ,  H01L31/035254 ,  H01L31/103 ,  H01L31/1812 ,  G02B6/4239 ,  Y02E10/50

Abstract: On a surface of a silicon substrate, N.sup.+ type buried layer and N-type epitaxial layer are formed in order, and an isolation layer reaching the silicon substrate from the surface of the N-type epitaxial layer is formed to define a photodiode. In the surface of the photodiode, a rectangular recess is selectively formed toward inside of the N-type epitaxial layer. On the side face of the recess, a silicon oxide layer is formed. In the region surrounded by the silicon oxide layer, a photo absorbing layer and so forth is formed. On the other hand, in an optical waveguide, a LOCOS oxide layer is formed toward inside from the surface of the N-type epitaxial layer. The N-type epitaxial layer is sandwiched between the LOCOS oxide layer and the N.sup.+ type buried layer. The refraction indexes of the LOCOS oxide layer and the N.sup.+ type buried layer are smaller than that of the N-type epitaxial layer. Thus, the N-type epitaxial layer serves as an optical passage to efficiently introduce a light beam into the photo absorbing layer of the photodiode.

Abstract translation: 在硅衬底的表面上依次形成N +型掩埋层和N型外延层，并且形成从N型外延层的表面到达硅衬底的隔离层以限定光电二极管。 在光电二极管的表面上，朝向N型外延层的内侧选择性地形成矩形凹部。 在凹部的侧面上形成氧化硅层。 在由氧化硅层包围的区域中，形成光吸收层等。 另一方面，在光波导中，从N型外延层的表面向内侧形成LOCOS氧化物层。 N型外延层夹在LOCOS氧化物层和N +型掩埋层之间。 LOCOS氧化物层和N +型掩埋层的折射率小于N型外延层的折射率。 因此，N型外延层用作有效地将光束引入到光电二极管的光吸收层中的光通路。

公开(公告)号：US5637513A

公开(公告)日：1997-06-10

申请号：US499493

申请日：1995-07-07

Applicant: Mitsuhiro Sugiyama

Inventor： Mitsuhiro Sugiyama

IPC: H01L21/331 ,  H01L29/73 ,  H01L21/265

CPC classification number: H01L29/66265 ,  H01L29/7317

Abstract: A fabrication method of a semiconductor device that can realize a semiconductor device having an improved radiation performance of heat together with a low parasitic capacitance between a semiconductor substrate and a conductor of the device. An SOI structure having a single-crystal silicon layer formed on an insulating substructure is prepared and then, device regions are formed on the substructure by using the single-crystal silicon layer. Sidewall insulators are formed to cover side faces of the respective device regions, laterally isolating the device regions from each other. A resistive silicon layer is formed on a non-device region of the substructure. The resistive silicon layer has a resistivity or specific resistance greater than that of the device regions. Electronic elements are formed in the device regions. The resistive silicon layer may be made of polysilicon or single-crystal silicon.

Abstract translation: 一种半导体器件的制造方法，其可以实现具有改善的放射性能的半导体器件以及半导体衬底和器件的导体之间的低寄生电容。 制备在绝缘子结构上形成单晶硅层的SOI结构，然后通过使用单晶硅层在子结构上形成器件区。 形成侧壁绝缘体以覆盖相应的器件区域的侧面，从而将器件区域彼此侧向隔离。 电阻硅层形成在子结构的非器件区域上。 电阻硅层的电阻率或电阻率大于器件区域的电阻率或电阻率。 电子元件形成在器件区域中。 电阻硅层可以由多晶硅或单晶硅制成。

公开(公告)号：US5451541A

公开(公告)日：1995-09-19

申请号：US340595

申请日：1994-11-16

Applicant: Mitsuhiro Sugiyama

Inventor： Mitsuhiro Sugiyama

IPC: H01L21/302 ,  H01L21/3065 ,  H01L21/66 ,  H01L21/762 ,  H01L27/12 ,  H01L21/20

CPC classification number: H01L22/12

Abstract: An insulating film is provided on a single crystal silicon layer of a SOI substrate, and a first groove for device isolation and a second groove for thickness measurement are formed to expose a surface of a silicon substrate of the SOI substrate. Then, the first and second grooves are filled with a filling film, and the filling film is etched back, so that the first groove is still filled with the filling film, while the filling film which have filled the second groove is removed to expose the surface of the silicon substrate, because the second groove has a width larger than that of the first groove.

Abstract translation: 在SOI衬底的单晶硅层上设置绝缘膜，形成用于器件隔离的第一沟槽和用于厚度测量的第二沟槽，以暴露SOI衬底的硅衬底的表面。 然后，第一和第二槽填充有填充膜，并且填充膜被回蚀刻，使得第一凹槽仍然填充有填充膜，同时去除填充第二凹槽的填充膜以暴露 因为第二槽的宽度大于第一槽的宽度。