公开(公告)号：US5744830A

公开(公告)日：1998-04-28

申请号：US556621

申请日：1995-11-13

Applicant: Sankaranarayanan Ekkanath-Madathil ,  Qin Huang ,  Gehan Anil Joseph Amaratunga ,  Naoki Kumagai

Inventor： Sankaranarayanan Ekkanath-Madathil ,  Qin Huang ,  Gehan Anil Joseph Amaratunga ,  Naoki Kumagai

IPC: H01L29/78 ,  H01L29/739 ,  H01L29/74 ,  H01L29/76

CPC classification number: H01L29/7395 ,  H01L29/7393

Abstract: A semiconductor device made of a lightly doped region of a first conductivity type has a well formed of a second conductivity type. The well extends to the surface of the device. First, second and third heavily doped regions of the first conductivity type are in the surface of the well. An electrode is fixed to the first heavily doped region of the first conductivity type. The third heavily doped region of the first conductivity type adjoins the lightly doped region of the first conductivity type. The first and second heavily doped regions of the first conductivity type are spaced apart from one another so that a portion of the well extends to the surface of the device therebetween. A first gate electrode is fixed via an insulating layer to a portion of the well extending between the first and second heavily doped regions. The first and third heavily doped regions of the first conductivity type are spaced apart from one another so that a portion of the well extends therebetween. A second gate electrode is fixed via an insulating layer to the portion of the well extending between the first and third heavily doped regions. Finally, a heavily doped region of the second conductivity type in the surface of the well is electrically connected to the second heavily doped region of the first conductivity type.

Abstract translation: 由第一导电类型的轻掺杂区域制成的半导体器件具有由第二导电类型形成的阱。 井延伸到设备的表面。 首先，第一导电类型的第二和第三重掺杂区域位于阱的表面中。 电极固定到第一导电类型的第一重掺杂区域。 第一导电类型的第三重掺杂区域邻接第一导电类型的轻掺杂区域。 第一导电类型的第一和第二重掺杂区域彼此间隔开，使得阱的一部分延伸到其间的器件的表面。 第一栅电极通过绝缘层固定到在第一和第二重掺杂区域之间延伸的阱的一部分。 第一导电类型的第一和第三重掺杂区域彼此间隔开，使得阱的一部分在其间延伸。 第二栅电极经由绝缘层固定到在第一和第三重掺杂区域之间延伸的阱的部分。 最后，阱的表面中的第二导电类型的重掺杂区域电连接到第一导电类型的第二重掺杂区域。

公开(公告)号：US5621229A

公开(公告)日：1997-04-15

申请号：US434243

申请日：1995-05-04

Applicant: Qin Huang

Inventor： Qin Huang

IPC: H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L29/78 ,  H01L29/861 ,  H01L23/58

CPC classification number: H01L29/7395 ,  H01L29/7398 ,  H01L29/7436 ,  H01L29/7455 ,  H01L29/749 ,  H01L2924/0002

Abstract: A semiconductor device which reduces the turn-off time and the accompanying switching loss in a switching semiconductor device in which conductivity modulation is used to provide a low ON-state voltage. The conductivity modulation is provided by injection of minority carriers. A minority carrier injection-control structure is provided in part of a semiconductor device to change the polarity of a voltage applied to a gate electrode to start or stop the injection of minority carriers. During the ON-state, minority carriers are injected to obtain a low ON-state voltage, while during the OFF-state, the injection of minority carriers are stopped and a channel for majority carriers is formed to eliminate the accumulation of excess carriers and to accelerate discharge, thereby reducing the turn-off time and thus the switching loss.

Abstract translation: 一种降低开关半导体器件中的关断时间和伴随的开关损耗的半导体器件，其中使用电导率调制来提供低导通状态电压。 通过注入少数载流子提供电导率调制。 在半导体器件的一部分中提供少数载流子注入控制结构，以改变施加到栅电极的电压的极性，以启动或停止少数载流子的注入。 在ON状态下，注入少量载流子以获得低导通状态电压，而在OFF状态期间，停止少数载流子的注入，形成多数载流子的沟道以消除过量载流子的积累，并且 加速放电，从而减少关断时间，从而减少开关损耗。

公开(公告)号：US20160289998A1

公开(公告)日：2016-10-06

申请号：US14673827

申请日：2015-03-30

Applicant: Qin Huang

Inventor： Qin Huang

IPC: E04H15/34 ,  E04H15/48

CPC classification number: E04H15/34 ,  A63B63/003 ,  A63B69/3623 ,  A63B71/022 ,  A63B2063/001 ,  A63B2210/50 ,  E04H15/48

Abstract: A golf practice tent having a ceiling, a floor and an open face for accepting golf balls that have been launched into the tent; a rigid frame structure at least partially external to the tent that provides structural support for the tent; and a planar net coupled to the ceiling of the tent and separated from a rear panel of the tent, such that the net hangs loosely from the ceiling and extends towards the floor, wherein the net is placed behind the open face such that golf balls that have been launched into the tent contact the net.

Abstract translation: 具有天花板，地板和开放面的高尔夫练习帐篷，用于接收已经发射到帐篷中的高尔夫球; 刚性框架结构至少部分地在帐篷的外部，为帐篷提供结构支撑; 以及耦合到帐篷的天花板并与帐篷的后面板分离的平面网，使得网从天花板松散地悬挂并朝向地板延伸，其中网被放置在开放面后面，使得高尔夫球 已经入帐到帐篷联网。

公开(公告)号：US08861238B2

公开(公告)日：2014-10-14

申请号：US13595883

申请日：2012-08-27

Applicant: Qin Huang ,  Yu Du ,  Wenxi Yao

Inventor： Qin Huang ,  Yu Du ,  Wenxi Yao

IPC: H02M7/217

CPC classification number: H02M7/217

Abstract: An alternating current-to-direct current (AC-DC) converter is provided. The converter may include a transformer having a primary side and a secondary side. A first bi-directional switch and a first inductor may be connected in series between a positive terminal of an AC source and a first terminal of the primary side of the transformer. A second bi-directional switch and a second inductor may be connected between the positive terminal of the AC source and a second terminal of the primary side of the transformer and connected in parallel with the first bi-directional switch.

Abstract translation: 提供交流电直流电（AC-DC）转换器。 转换器可以包括具有初级侧和次级侧的变压器。 第一双向开关和第一电感器可以串联连接在AC电源的正极端子和变压器初级侧的第一端子之间。 第二双向开关和第二电感器可以连接在AC源的正极端子和变压器初级侧的第二端子之间并与第一双向开关并联连接。

公开(公告)号：US08604541B2

公开(公告)日：2013-12-10

申请号：US13441101

申请日：2012-04-06

Applicant: Qin Huang ,  Yuming Bai ,  Yang Gao

Inventor： Qin Huang ,  Yuming Bai ,  Yang Gao

IPC: H01L29/78

CPC classification number: H01L29/7802 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/6634 ,  H01L29/66727 ,  H01L29/7396

Abstract: This invention discloses a specific superjunction MOSFET structure and its fabrication process. Such structure includes: a drain, a substrate, an EPI, a source, a side-wall isolation structure, a gate, a gate isolation layer and source. There is an isolation layer inside the active area underneath the source. Along the side-wall of this isolation layer, a buffer layer with same doping type as body can be introduced & source can be extended down too to form field plate. Such buffer layer & field plate can make the EPI doping much higher than convention device which results in lower Rdson, better performance, shorter gate so that to reduce both gate charge Qg and gate-to-drain charge Qgd. The process to make such structure is simpler and more cost effective.

Abstract translation: 本发明公开了一种具体的超结MOSFET结构及其制造工艺。 这种结构包括：漏极，衬底，EPI，源极，侧壁隔离结构，栅极，栅极隔离层和源极。 在源下面的活动区域内有隔离层。 沿着该隔离层的侧壁，可以引入与主体相同的掺杂类型的缓冲层，并且还可以将源延伸以形成场板。 这种缓冲层和场板可以使EPI掺杂比常规器件高得多，这导致较低的Rdson，更好的性能，更短的栅极，从而减小栅极电荷Qg和栅极至漏极电荷Qgd。 制造这种结构的过程更简单，更具成本效益。

公开(公告)号：US20120256254A1

公开(公告)日：2012-10-11

申请号：US13441101

申请日：2012-04-06

Applicant: Qin HUANG ,  Yuming BAI ,  Yang GAO

Inventor： Qin HUANG ,  Yuming BAI ,  Yang GAO

IPC: H01L29/78 ,  H01L21/336

CPC classification number: H01L29/7802 ,  H01L21/26586 ,  H01L29/0634 ,  H01L29/0653 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/6634 ,  H01L29/66727 ,  H01L29/7396

Abstract: This invention discloses a specific superjunction MOSFET structure and its fabrication process. Such structure includes: a drain, a substrate, an EPI, a source, a side-wall isolation structure, a gate, a gate isolation layer and source. There is an isolation layer inside the active area underneath the source. Along the side-wall of this isolation layer, a buffer layer with same doping type as body can be introduced & source can be extended down too to form field plate. Such buffer layer & field plate can make the EPI doping much higher than convention device which results in lower Rdson, better performance, shorter gate so that to reduce both gate charge Qg and gate-to-drain charge Qgd. The process to make such structure is simpler and more cost effective.

Abstract translation: 本发明公开了一种具体的超结MOSFET结构及其制造工艺。 这种结构包括：漏极，衬底，EPI，源极，侧壁隔离结构，栅极，栅极隔离层和源极。 在源下面的活动区域内有隔离层。 沿着该隔离层的侧壁，可以引入与主体相同的掺杂类型的缓冲层，并且还可以将源延伸以形成场板。 这种缓冲层和场板可以使EPI掺杂比常规器件高得多，这导致较低的Rdson，更好的性能，更短的栅极，从而减小栅极电荷Qg和栅极至漏极电荷Qgd。 制造这种结构的过程更简单，更具成本效益。

公开(公告)号：US07230837B1

公开(公告)日：2007-06-12

申请号：US11277594

申请日：2006-03-27

Applicant: Qin Huang ,  Abdel-Aty Edris ,  Michael R. Ingram ,  Siriroj Sirisukprasert

Inventor： Qin Huang ,  Abdel-Aty Edris ,  Michael R. Ingram ,  Siriroj Sirisukprasert

IPC: H02M7/521 ,  H02J1/14

CPC classification number: H02M7/49 ,  H02J3/1857 ,  H02M7/5395 ,  H02M2007/4835 ,  Y02E40/26

Abstract: A method of balancing the voltage of DC links in a cascaded multi-level converter (CMC) semiconductor circuit, including the steps of providing a plurality of H-bridge converters per phase in the CMC circuit and utilizing a three phase duty cycle value from the main controller to determine a normalized duty cycle value, a ceiling duty cycle value and a floor duty cycle value. The normalized duty cycle value and an output current of the CMC is used to determine the direction and polarity of a capacitor current, and utilizing the capacitor current to determine a plurality of output capacitor voltages. A voltage summation result and direction is obtained from a ceiling index pointer and a floor index pointer and the voltage summation result, direction from the ceiling index pointer and a floor index pointer are used to create a combined switching table for the H-bridge converters. A pulse width modulator is utilized to balance the voltage of the DC links and thereby eliminate DC-capacitor voltage imbalance.

Abstract translation: 一种在级联多电平转换器（CMC）半导体电路中平衡DC链路的电压的方法，包括以下步骤：在CMC电路中每相提供多个H桥转换器，并利用三相占空比值 主控制器确定归一化占空比值，最大占空比值和占地面积占空比值。 使用CMC的归一化占空比值和输出电流来确定电容器电流的方向和极性，并且利用电容器电流来确定多个输出电容器电压。 使用上限索引指针和底部索引指针获得电压求和结果和方向，并且使用电压求和结果，从天花板索引指针和地板索引指针的方向来创建用于H桥转换器的组合切换表。 利用脉冲宽度调制器来平衡DC链路的电压，从而消除直流电容器电压不平衡。

公开(公告)号：US20060279350A1

公开(公告)日：2006-12-14

申请号：US11431103

申请日：2006-05-10

Applicant: Xin Zhang ,  Qin Huang

Inventor： Xin Zhang ,  Qin Huang

IPC: H03K17/00

CPC classification number: G06F1/26 ,  H02J1/102 ,  H02M3/1584 ,  H02M2003/1586

Abstract: An integrated circuit power device includes a monolithic voltage regulator channel for providing low voltage high current output. The devices can be installed in parallel without a master control IC and without limitations on the number of channels to support CPU power, or can be used alone to support regular Point of Load. Novel and effective control scheme and analog circuits are provided to implement the device, including a distributed current sharing and adaptive voltage position scheme, an automatic interleaving scheme with self-adjusted carrier generator, and a novel current sensing scheme with an accurate transconductance amplifier.

Abstract translation: 集成电路功率器件包括用于提供低电压大电流输出的单片电压调节器通道。 这些设备可以并行安装，不需要主控制IC，并且不限制支持CPU电源的通道数量，也可以单独使用以支持常规负载点。 提供新颖有效的控制方案和模拟电路来实现该器件，包括分布式电流共享和自适应电压位置方案，具有自调整载波发生器的自动交织方案，以及具有精确跨导放大器的新型电流检测方案。

公开(公告)号：US07109692B1

公开(公告)日：2006-09-19

申请号：US11286321

申请日：2005-11-25

Applicant: Chung-Cheng Wu ,  Qin Huang ,  Xiao-Ming Duan

Inventor： Chung-Cheng Wu ,  Qin Huang ,  Xiao-Ming Duan

IPC: G05F1/40

CPC classification number: H02M3/157 ,  H02M1/44 ,  H02M3/1563

Abstract: A high-speed PWM control apparatus with adaptive voltage position and a driving signal generating method thereof is provided. The present invention automatically detects a change in the loading and adjusts the voltage position instantaneously for stabilizing the voltage and reducing the loading output power consumption. The present invention does not require a clock signal to generate a driving signal and does not require an error amplifier to control the modulation. Therefore, the present invention has a fast transient response that responds to the change of the loading instantaneously and has a stabilizing effect. When the apparatus is on a continuous conduction mode (CCM), the switching frequency of the controller is still fixed even though the input voltage Vin and the output voltage Vout are changed. The electrical-magnetic noise disturbance is improved.

Abstract translation: 提供一种具有自适应电压位置的高速PWM控制装置及其驱动信号产生方法。 本发明自动检测负载变化并且瞬时调节电压位置以稳定电压并降低负载输出功率消耗。 本发明不需要时钟信号来产生驱动信号，并且不需要误差放大器来控制调制。 因此，本发明具有快速瞬时响应，其瞬时响应负载变化并且具有稳定效果。 当设备处于连续导通模式（CCM）时，即使输入电压Vin和输出电压Vout改变，控制器的开关频率仍然是固定的。 电磁噪声干扰得到改善。

公开(公告)号：US5665988A

公开(公告)日：1997-09-09

申请号：US721939

申请日：1996-09-27

Applicant: Qin Huang

Inventor： Qin Huang

IPC: H01L29/10 ,  H01L29/739 ,  H01L29/74 ,  H01L29/745 ,  H01L29/749 ,  H01L23/58 ,  H01L29/76 ,  H01L31/111

CPC classification number: H01L29/7436 ,  H01L29/1016 ,  H01L29/7392 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/7455 ,  H01L29/749 ,  H01L2924/0002

Abstract: A plurality of minority carriers, which cause a conductivity modulation effect in a semiconductor device, are supplied from a separately disposed minority carrier injection region which is alternately connected to and separated from a drain region. The minority carriers are injected via the minority carrier injection region connected to the drain region during forward biasing. The minority carrier injection is stopped by separating the injection region from the drain region when the turn-off operation begins. This operation reduces the carriers that need to be swept off during a turn-off operation. The turn-off time is shortened in a bipolar semiconductor device, such as an IGBT with a reduced on-voltage, by utilizing the conductivity modulation to reduce switching loss.

Abstract translation: 在半导体器件中引起电导率调制效应的多个少数载流子从交替地连接到漏极区域并从漏极区域分离的单独设置的少数载流子注入区域提供。 通过在正向偏置期间连接到漏极区域的少数载流子注入区域来注入少数载流子。 当关断操作开始时，通过将注入区域与漏极区域分离来停止少数载流子注入。 该操作减少了在关闭操作期间需要扫除的载体。 通过利用电导率调制来减少开关损耗，双极半导体器件（例如具有降低的导通电压的IGBT）的关断时间缩短。