LIGHT EMITTING DEVICE
    21.
    发明申请
    LIGHT EMITTING DEVICE 有权
    发光装置

    公开(公告)号:US20120138995A1

    公开(公告)日:2012-06-07

    申请号:US13372265

    申请日:2012-02-13

    申请人: Sung Min HWANG

    发明人: Sung Min HWANG

    IPC分类号: H01L33/60

    摘要: A light emitting device includes a substrate, a first conductive type semiconductor layer disposed on the substrate, an active layer disposed on one part of the first conductive type semiconductor layer, a second conductive type semiconductor layer disposed on the active layer, a first electrode disposed on the second conductive type semiconductor layer, and a second electrode disposed on the other part of the first conductive type semiconductor layer, wherein a trench is formed at a portion of the second conductive type semiconductor layer, the active layer or the first conductive type semiconductor layer so that the trench is disposed under the first electrode.

    摘要翻译: 发光器件包括衬底,设置在衬底上的第一导电类型半导体层,设置在第一导电类型半导体层的一部分上的有源层,设置在有源层上的第二导电型半导体层,设置在第一导电类型半导体层上的第一电极 在第二导电类型半导体层上的第二导电型半导体层的一部分上形成沟槽,在第二导电型半导体层的一部分上形成有沟槽, 使得沟槽设置在第一电极下方。

    THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME
    22.
    发明申请
    THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES AND METHODS OF FABRICATING THE SAME 有权
    三维半导体存储器件及其制造方法

    公开(公告)号:US20120098049A1

    公开(公告)日:2012-04-26

    申请号:US13276682

    申请日:2011-10-19

    IPC分类号: H01L29/792

    摘要: A three dimensional semiconductor memory device has a stacked structure including cell gates stacked therein that are insulated from each other and first string selection gates laterally separated from each other, vertical active patterns extending through the first string selection gates, multi-layered dielectric layers between sidewalls of the vertical active patterns and the cell gates and between the sidewalls of the vertical active patterns and the first string selection gates, and at least one first supplement conductive pattern. The first string selection gates are disposed over an uppermost cell gate of the cell gates. Each vertical active pattern extends through each of the cell gates stacked under the first string selection gates. The first supplement conductive pattern is in contact with a sidewall of one of the first string selection gates.

    摘要翻译: 三维半导体存储器件具有层叠结构,其包括彼此绝缘的单元栅极和彼此横向分离的第一串选择栅极,延伸穿过第一串选择栅极的垂直有源图案,侧壁之间的多层电介质层 垂直有源图案和单元栅极之间以及垂直有源图案和第一串选择栅极的侧壁之间以及至少一个第一补充导电图案。 第一串选择栅极设置在单元栅极的最上面的单元栅极上。 每个垂直有源图案延伸穿过堆叠在第一串选择门下的每个单元门。 第一补充导电图案与第一串选择门之一的侧壁接触。

    THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES
    23.
    发明申请
    THREE DIMENSIONAL SEMICONDUCTOR MEMORY DEVICES 有权
    三维半导体存储器件

    公开(公告)号:US20120061744A1

    公开(公告)日:2012-03-15

    申请号:US13229136

    申请日:2011-09-09

    IPC分类号: H01L27/105

    摘要: Three dimensional semiconductor memory devices are provided. The three dimensional semiconductor memory device includes a first stacked structure and a second stacked structure sequentially stacked on a substrate. The first stacked structure includes first insulating patterns and first gate patterns which are alternately and repeatedly stacked on a substrate, and the second stacked structure includes second insulating patterns and second gate patterns which are alternately and repeatedly stacked on the first stacked structure. A plurality of first vertical active patterns penetrate the first stacked structure, and a plurality of second vertical active patterns penetrate the second stacked structure. The number of the first vertical active patterns is greater than the number of the second vertical active patterns.

    摘要翻译: 提供三维半导体存储器件。 三维半导体存储器件包括顺序层叠在基板上的第一堆叠结构和第二堆叠结构。 第一堆叠结构包括在衬底上交替重复堆叠的第一绝缘图案和第一栅极图案,并且第二堆叠结构包括在第一堆叠结构上交替重复堆叠的第二绝缘图案和第二栅极图案。 多个第一垂直有源图案穿透第一堆叠结构,并且多个第二垂直有源图案穿透第二堆叠结构。 第一垂直有源图案的数量大于第二垂直有效图案的数量。

    LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE
    24.
    发明申请
    LIGHT EMITTING DEVICE AND LIGHT EMITTING DEVICE PACKAGE 审中-公开
    发光装置和发光装置包装

    公开(公告)号:US20110095320A1

    公开(公告)日:2011-04-28

    申请号:US12909236

    申请日:2010-10-21

    申请人: Sung Min HWANG

    发明人: Sung Min HWANG

    IPC分类号: H01L33/60

    摘要: Disclosed are a light emitting device, a light emitting device package, and a lighting system. The light emitting device includes a light emitting structure including a second conductive semiconductor layer, an active layer over the second conductive semiconductor layer, and a first conductive semiconductor layer over the active layer dielectric layer in a cavity defined by removing a portion of the light emitting structure, and a second electrode layer over the dielectric layer.

    摘要翻译: 公开了一种发光器件,发光器件封装和照明系统。 发光器件包括发光结构,该发光结构包括第二导电半导体层,在第二导电半导体层上的有源层,以及位于空腔中的有源层电介质层上的第一导电半导体层,该空腔通过去除一部分发光 结构以及介电层上的第二电极层。

    LIGHT EMITTING DEVICE, SYSTEM AND PACKAGE
    26.
    发明申请
    LIGHT EMITTING DEVICE, SYSTEM AND PACKAGE 有权
    发光装置,系统和包装

    公开(公告)号:US20110057224A1

    公开(公告)日:2011-03-10

    申请号:US12878819

    申请日:2010-09-09

    申请人: Sung Min HWANG

    发明人: Sung Min HWANG

    IPC分类号: H01L33/48

    摘要: A light emitting device includes a light emitting structure formed from an active layer located between two semiconductor layers. An insulator extends through the active layer and at least partially through the semiconductor layers, and the light emitting structure is located between a first electrode and a second electrode layer. The first electrode and insulator overlap one another and may have the same or different widths.

    摘要翻译: 发光器件包括由位于两个半导体层之间的有源层形成的发光结构。 绝缘体延伸穿过有源层并且至少部分地穿过半导体层,并且发光结构位于第一电极和第二电极层之间。 第一电极和绝缘体彼此重叠并且可以具有相同或不同的宽度。

    THREE-DIMENSIONAL SEMICONDUCTOR DEVICE

    公开(公告)号:US20170338242A1

    公开(公告)日:2017-11-23

    申请号:US15437426

    申请日:2017-02-20

    申请人: Sung-Min HWANG

    发明人: Sung-Min HWANG

    摘要: A three-dimensional semiconductor device may include a lower electrode structure having a plurality of lower electrodes vertically stacked on a substrate and an upper electrode structure having a plurality of upper electrodes stacked on the lower electrode structure. Each of the lower and upper electrodes may include an electrode portion that is parallel to a top surface of the substrate and a vertical pad portion that is inclined with respect to the top surface of the substrate. The vertical pad portions of adjacent lower electrodes may be spaced apart from each other by a first horizontal distance. The vertical pad portions of adjacent lower and upper electrodes may be spaced apart from each other by a second horizontal distance that is greater than the first horizontal distance.