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    Magnetic packet memory storage devices, memory systems including such devices, and methods of controlling such devices
    25.
    发明申请
    Magnetic packet memory storage devices, memory systems including such devices, and methods of controlling such devices 失效
    磁性分组存储器存储设备，包括这种设备的存储器系统以及控制这些设备的方法

    公开(公告)号：US20100208381A1

    公开(公告)日：2010-08-19

    申请号：US12658807

    申请日：2010-02-16

    Applicant: Ho-jung Kim ,  Chul-woo Park ,  Sang-beom Kang ,  Jong-wan Kim ,  Hyun-ho Choi ,  Young-pil Kim ,  Sung-chul Lee

    Inventor： Ho-jung Kim ,  Chul-woo Park ,  Sang-beom Kang ,  Jong-wan Kim ,  Hyun-ho Choi ,  Young-pil Kim ,  Sung-chul Lee

    IPC: G11B19/02

    CPC classification number: G11C11/15 ,  G11C5/04

    Abstract: A memory device is comprised of a magnetic structure that stores information in a plurality of domains of the magnetic structure. A write unit writes information to at least one of the plurality of domains of the magnetic structure by applying a write current to the magnetic structure in response to a control signal. A read unit reads information from at least one of the plurality of domains of the magnetic structure by applying a read current to the magnetic structure in response to the control signal. A domain wall movement control unit is coupled to a portion of the magnetic structure and moves information stored in the plurality of domains in the magnetic structure to other domains in the magnetic structure in response to the control signal. The write unit, the read unit and the domain wall movement control unit are all coupled to the same control signal line that provides the control signal.

    Abstract translation: 存储器件由将磁信息存储在磁结构的多个域中的磁结构构成。 写单元响应于控制信号向磁结构施加写入电流，将信息写入磁结构的多个域中的至少一个。 读取单元通过响应于控制信号向磁性结构施加读取电流，从磁性结构的多个域中的至少一个域读取信息。 畴壁移动控制单元耦合到磁结构的一部分，并且响应于控制信号将存储在磁结构中的多个域中的信息移动到磁结构中的其他区域。 写单元，读单元和域壁移动控制单元都耦合到提供控制信号的相同控制信号线。

    Controlling AC disturbance while programming
    29.
    发明授权
    Controlling AC disturbance while programming 有权
    在编程时控制交流干扰

    公开(公告)号：US07679967B2

    公开(公告)日：2010-03-16

    申请号：US11963508

    申请日：2007-12-21

    Applicant: Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

    Inventor： Sung-Yong Chung ,  Zhizheng Liu ,  Yugi Mizuguchi ,  Xuguang Alan Wang ,  Yi He ,  Ming Kwan ,  Darlene Hamilton ,  Sung-Chul Lee ,  Guowei Wang ,  Nancy Leong

    IPC: G11C16/06

    CPC classification number: G11C16/3418 ,  G11C16/0416 ,  G11C16/24 ,  G11C16/3427

    Abstract: A system and methodology that can minimize disturbance during an AC operation associated with a memory, such as, program, read and/or erase, is provided. The system pre-charges all or a desired subset of the bit lines in a memory array to a specified voltage, during an AC operation to facilitate reducing AC disturbances between neighboring cells. A pre-charge voltage can be applied to all bit lines in a block in the memory array, or to bit lines associated with a selected memory cell and neighbor memory cells adjacent to the selected memory cell in the block. The system ensures that source and drain voltage levels can be set to desired levels at the same or substantially the same time, while selecting a memory cell. This can facilitate minimizing AC disturbances in the selected memory cell during the AC operation.

    Abstract translation: 提供了一种能够在与诸如程序，读取和/或擦除之类的存储器相关联的AC操作期间最小化干扰的系统和方法。 在AC操作期间，系统将存储器阵列中的所有或所需的位线子集预充电到指定的电压，以便于减少相邻单元之间的AC干扰。 可以将预充电电压施加到存储器阵列中的块中的所有位线，或者对与所选择的存储器单元相关联的位线以及与块中所选择的存储单元相邻的相邻存储单元。 该系统确保在选择存储器单元时，源极和漏极电压电平可以在相同或基本相同的时间被设置为期望的电平。 这可以有助于在AC操作期间最小化所选择的存储器单元中的AC干扰。

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