公开(公告)号：US20100003927A1

公开(公告)日：2010-01-07

申请号：US12496237

申请日：2009-07-01

Applicant: Yu-Pin CHOU ,  Tzuo-Bo LIN ,  Chih-Ming LEE

Inventor： Yu-Pin CHOU ,  Tzuo-Bo LIN ,  Chih-Ming LEE

IPC: H04B1/00

CPC classification number: G09G5/006 ,  G09G2330/022

Abstract: Disclosed is an apparatus and method of power-saving and wake-up, which is not only used to reduce the power consumption of a system of electronic equipment, but also allow the system to immediately return to normal operation according to the requirement. The apparatus for power-saving and wake-up includes a first detector, a second detector, a decoder and a third detector. The method for power-saving and wake-up includes detecting a cable signal, a clock pair signal and a differential pair signal. When one of the detected signals is unusual, the system soon turns off the unusual channel power and implement the procedures for power saving and operates under the power saving mode, which can realize the effect of power saving and low power consumption. The method for power-saving and wake-up includes detecting the cable signal, the toggling and frequency of the clock signal and the synchronizing signals of the system.

Abstract translation: 本发明公开了一种省电唤醒的装置和方法，不仅用于降低电子设备系统的功耗，而且可以根据需要立即恢复正常运行。 用于省电和唤醒的装置包括第一检测器，第二检测器，解码器和第三检测器。 省电和唤醒的方法包括检测电缆信号，时钟对信号和差分对信号。 当其中一个检测到的信号异常时，系统即将关闭异常通道电源，实现节电程序，并在省电模式下工作，实现省电，低功耗的效果。 节电和唤醒的方法包括检测电缆信号，时钟信号的切换和频率以及系统的同步信号。

公开(公告)号：US20080266454A1

公开(公告)日：2008-10-30

申请号：US12109868

申请日：2008-04-25

Applicant: Tzuo-Bo Lin ,  Wen-Hsia Kung ,  Hsien-Chun Chang

Inventor： Tzuo-Bo Lin ,  Wen-Hsia Kung ,  Hsien-Chun Chang

IPC: H03L7/00 ,  H04N5/04

CPC classification number: H04N5/04 ,  H03L7/06

Abstract: The invention discloses a sink device. The sink device comprises a buffering unit and a clock generating unit. The buffering unit receives a decoding data according to a symbol clock signal, reads the decoding data according to a pixel clock signal, and generates a water level value. The clock generating unit receives the symbol clock signal to generate the pixel clock signal and adjusts a rate of the pixel clock signal according to the water level value and/or a phase difference signal.

Abstract translation: 本发明公开了一种信宿设备。 宿设备包括缓冲单元和时钟发生单元。 缓冲单元根据符号时钟信号接收解码数据，根据像素时钟信号读取解码数据，并产生水位值。 时钟发生单元接收符号时钟信号以产生像素时钟信号，并根据水位值和/或相位差信号调整像素时钟信号的速率。

公开(公告)号：US20080111921A1

公开(公告)日：2008-05-15

申请号：US11937108

申请日：2007-11-08

Applicant: HSU-JUNG TUNG ,  TZUO-BO LIN

Inventor： HSU-JUNG TUNG ,  TZUO-BO LIN

IPC: H04N3/27

CPC classification number: H04N5/44 ,  H04N21/4394 ,  H04N21/4396 ,  H04N21/44008 ,  H04N21/4402

Abstract: The invention relates to a receiving device for an audio-video system. The receiving device comprises a connector, a video processing unit, an audio processing module, and a monitoring unit. The monitoring unit detects a status of an inputted signal received by the connector and controls the operation of at lease one of the video processing unit and the audio processing module in accordance with the detected result to avoid the audio-video system display abnormal image or play noise when the receiving device did not receive the inputted signal by accident.

Abstract translation: 本发明涉及一种用于音视频系统的接收装置。 接收装置包括连接器，视频处理单元，音频处理模块和监视单元。 监视单元检测由连接器接收的输入信号的状态，并且根据检测结果控制视频处理单元和音频处理模块中的至少一个的操作，以避免音频 - 视频系统显示异常图像或播放 当接收设备没有意外地接收到输入信号时的噪声。

公开(公告)号：US20070050063A1

公开(公告)日：2007-03-01

申请号：US11511242

申请日：2006-08-29

Applicant: Hsu-Jung Tung ,  Tzuo-Bo Lin

Inventor： Hsu-Jung Tung ,  Tzuo-Bo Lin

IPC: G06F17/00

CPC classification number: G10L19/005

Abstract: An apparatus for processing an audio signal and method thereof applied to an audio playback system are disclosed. The apparatus comprises a decoder, an error-correcting circuit and an audio correcting module. The method for processing audio signals in accordance with the present invention decodes the audio signal to generate a decoded signal by the decoder. Then, the error-correcting circuit performs an error-correcting algorithm in the decoded signal to generate an error indication signal and an output audio signal. And the audio correcting module corrects the output audio signal to generate a corrected audio signal when the error indication signal indicates that the output audio signal has error.

Abstract translation: 公开了一种用于处理音频信号的装置及其应用于音频播放系统的方法。 该装置包括解码器，纠错电路和音频校正模块。 根据本发明的用于处理音频信号的方法解码音频信号以由解码器产生解码信号。 然后，纠错电路在解码信号中执行纠错算法，以产生错误指示信号和输出音频信号。 并且当错误指示信号指示输出音频信号具有错误时，音频校正模块校正输出音频信号以产生校正的音频信号。

公开(公告)号：US08533573B2

公开(公告)日：2013-09-10

申请号：US12051641

申请日：2008-03-19

Applicant: Tzuo-Bo Lin

Inventor： Tzuo-Bo Lin

IPC: H03M13/00

CPC classification number: H04L25/4908 ,  H04L25/03019 ,  H04L2025/03356 ,  H04L2025/03598

Abstract: An error correction circuit and method applicable to a DisplayPort receiver is disclosed. While decoding errors occur at a decoding stage, the invention actively adjusts settings of a physical layer by using an ANSI10B/8B decoder and performs data recovery by using a correcting unit that improves the reliability of input data.

Abstract translation: 公开了适用于DisplayPort接收机的纠错电路和方法。 虽然在解码阶段发生解码错误，但是本发明通过使用ANSI10B / 8B解码器主动地调整物理层的设置，并且通过使用提高输入数据的可靠性的校正单元执行数据恢复。

公开(公告)号：US08513708B2

公开(公告)日：2013-08-20

申请号：US12127265

申请日：2008-05-27

Applicant: Hsien Chun Chang ,  Chia Lung Hung ,  Tsung Chi Lin ,  Tzuo Bo Lin

Inventor： Hsien Chun Chang ,  Chia Lung Hung ,  Tsung Chi Lin ,  Tzuo Bo Lin

IPC: H01L27/10

CPC classification number: H01L23/50 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/18 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/10161 ,  H01L2924/14 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: The present invention provides an integrated circuit suitable for various packaging modes. This integrated circuit includes: a core circuit, a plurality of pads, and a selection circuit. The selection circuit is coupled between the core circuit and the pads for determining the connection state between the core circuit and the pads based on a control signal. When the control signal provides a first value, the core circuit and the pads will be in a first connection state, and the integrated circuit will be applied with a single-die package. However, when the control signal provides a second value, the core circuit and the pads will be in the second connection state, and the integrated circuit will be applied with a multi-die package.

Abstract translation: 本发明提供适用于各种封装模式的集成电路。 该集成电路包括：核心电路，多个焊盘以及选择电路。 选择电路耦合在核心电路和焊盘之间，用于基于控制信号确定核心电路和焊盘之间的连接状态。 当控制信号提供第一值时，核心电路和焊盘将处于第一连接状态，并且集成电路将被应用于单模封装。 然而，当控制信号提供第二值时，核心电路和焊盘将处于第二连接状态，并且集成电路将被应用于多管芯封装。

公开(公告)号：US08362804B2

公开(公告)日：2013-01-29

申请号：US12726931

申请日：2010-03-18

Applicant: Wen-Hsia Kung ,  Tzuo-Bo Lin ,  Chia-Lung Hung ,  Yu-Pin Chou

Inventor： Wen-Hsia Kung ,  Tzuo-Bo Lin ,  Chia-Lung Hung ,  Yu-Pin Chou

IPC: H03K19/0175

CPC classification number: H03K5/151 ,  H03K19/0008

Abstract: A differential signal generating device includes a control circuit and a differential signal driver receiving a single-ended signal. The control circuit receives a source signal and generates a control signal corresponding to a first mode when the source signal conforms with a first pre-defined state, and corresponding to a second mode when the source signal conforms with a second pre-defined state. Variations of the source signal are related to signal content of the single-ended signal. The differential signal driver is coupled to the control unit for receiving the control signal therefrom. The differential signal driver outputs a differential signal output according to the single-ended signal when the control signal corresponds to the first mode. The differential signal driver outputs a non-differential signal output when the control signal corresponds to the second mode.

Abstract translation: 差分信号发生装置包括控制电路和接收单端信号的差分信号驱动器。 当源信号符合第一预定义状态时，控制电路接收源信号并产生对应于第一模式的控制信号，并且当源信号符合第二预定义状态时，控制电路对应于第二模式。 源信号的变化与单端信号的信号内容有关。 差分信号驱动器耦合到控制单元以从其接收控制信号。 当控制信号对应于第一模式时，差分信号驱动器根据单端信号输出差分信号。 当控制信号对应于第二模式时，差分信号驱动器输出非差分信号输出。

公开(公告)号：US08331460B2

公开(公告)日：2012-12-11

申请号：US12109868

申请日：2008-04-25

Applicant: Tzuo-Bo Lin ,  Wen-Hsia Kung ,  Hsien-Chun Chang

Inventor： Tzuo-Bo Lin ,  Wen-Hsia Kung ,  Hsien-Chun Chang

IPC: H04N7/12 ,  H04N11/02 ,  H04N11/04

CPC classification number: H04N5/04 ,  H03L7/06

Abstract: The invention discloses a sink device. The sink device comprises a buffering unit and a clock generating unit. The buffering unit receives a decoding data according to a symbol clock signal, reads the decoding data according to a pixel clock signal, and generates a water level value. The clock generating unit receives the symbol clock signal to generate the pixel clock signal and adjusts a rate of the pixel clock signal according to the water level value and/or a phase difference signal.

Abstract translation: 本发明公开了一种信宿设备。 宿设备包括缓冲单元和时钟发生单元。 缓冲单元根据符号时钟信号接收解码数据，根据像素时钟信号读取解码数据，并产生水位值。 时钟发生单元接收符号时钟信号以产生像素时钟信号，并根据水位值和/或相位差信号调整像素时钟信号的速率。

公开(公告)号：US08330761B2

公开(公告)日：2012-12-11

申请号：US12010374

申请日：2008-01-24

Applicant: Tzuo-Bo Lin ,  Wen-Hsia Kung

Inventor： Tzuo-Bo Lin ,  Wen-Hsia Kung

IPC: G06F15/00

CPC classification number: G09G5/006

Abstract: A method for reducing output rate of video data for DisplayPort sink device is disclosed. By reducing the size of a blank area in a video frame, the invention reduces a pixel rate to become compatible with more types of back-end circuits having lower processing rates.

Abstract translation: 公开了一种用于降低DisplayPort宿设备的视频数据输出速率的方法。 通过减小视频帧中的空白区域的大小，本发明降低像素速率以与具有较低处理速率的更多类型的后端电路相兼容。

公开(公告)号：US08121181B2

公开(公告)日：2012-02-21

申请号：US12129687

申请日：2008-05-30

Applicant: Tzuo-Bo Lin ,  Hong-Ta Liu

Inventor： Tzuo-Bo Lin ,  Hong-Ta Liu

IPC: H04B3/46

CPC classification number: G09G5/006 ,  G09G2370/04 ,  G09G2370/10 ,  G09G2370/12

Abstract: The present invention discloses a method for determining a target type of a plurality of control signals respectively transmitted via a plurality of channels in a multi-channel system. The method includes: receiving a plurality of first control signals simultaneously from the channels during a first time period; determining a control signal priority corresponding to the first time period according to a target type determined by actual types of a plurality of second control signals respectively transmitted via the channels during a second time period, wherein the second time period is prior to the first time period; and determining the target type of the first control signals according to the control signal priority and actual types of the first control signals.

Abstract translation: 本发明公开了一种用于确定在多声道系统中分别经由多个声道发送的多个控制信号的目标类型的方法。 该方法包括：在第一时段期间从信道同时接收多个第一控制信号; 根据在第二时间段期间经由信道分别发送的多个第二控制信号的实际类型确定的目标类型来确定对应于第一时间段的控制信号优先级，其中第二时间段在第一时间段之前 ; 以及根据控制信号优先级和第一控制信号的实际类型来确定第一控制信号的目标类型。