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49 条记录 (耗时 0.017 秒)

    Method for the production of an integrated semiconductor memory configuration
    21.
    发明授权
    Method for the production of an integrated semiconductor memory configuration 有权
    用于生产集成半导体存储器配置的方法

    公开(公告)号：US06197633B1

    公开(公告)日：2001-03-06

    申请号：US09281822

    申请日：1999-03-30

    申请人： Günther Schindler ,  Walter Hartner ,  Carlos Mazure-Espejo

    发明人： Günther Schindler ,  Walter Hartner ,  Carlos Mazure-Espejo

    IPC分类号： H01L218242

    CPC分类号： H01L27/10852 ,  H01L27/10817

    摘要： A method for producing a memory configuration that comprises a multiplicity of memory cells, and has storage capacitors whose first electrodes are configured in plate form in a parallel manner one above the other. These electrodes are in electrical contact with selection transistors of the memory cell through contact plugs having different lengths. The first electrodes preferably extend beyond the cell area of one memory cell.

    摘要翻译： 一种用于产生包括多个存储单元的存储器配置的方法，并且具有其第一电极以彼此并列的方式配置为板形的存储电容器。 这些电极通过具有不同长度的接触插塞与存储器单元的选择晶体管电接触。 优选地，第一电极延伸超过一个存储单元的单元区域。

    Semiconductor component including an isolation structure and a contact to the substrate
    22.
    发明授权
    Semiconductor component including an isolation structure and a contact to the substrate 有权
    半导体元件包括隔离结构和与衬底的接触

    公开(公告)号：US07982284B2

    公开(公告)日：2011-07-19

    申请号：US11477076

    申请日：2006-06-28

    申请人： Andreas Meiser ,  Walter Hartner ,  Hermann Gruber ,  Dietrich Bonart ,  Thomas Gross

    发明人： Andreas Meiser ,  Walter Hartner ,  Hermann Gruber ,  Dietrich Bonart ,  Thomas Gross

    IPC分类号： H01L21/763 ,  H01L27/105

    CPC分类号： H01L21/76802 ,  H01L21/76286 ,  H01L21/76877 ,  H01L21/84 ,  H01L27/1203

    摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

    摘要翻译： 半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层 半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。 掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。 隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

    Semiconductor component and methods for producing a semiconductor component
    23.
    发明申请
    Semiconductor component and methods for producing a semiconductor component 有权
    半导体元件及其制造方法

    公开(公告)号：US20080012090A1

    公开(公告)日：2008-01-17

    申请号：US11477076

    申请日：2006-06-28

    申请人： Andreas Meiser ,  Walter Hartner ,  Hermann Gruber ,  Dietrich Bonart ,  Thomas Gross

    发明人： Andreas Meiser ,  Walter Hartner ,  Hermann Gruber ,  Dietrich Bonart ,  Thomas Gross

    IPC分类号： H01L29/00

    CPC分类号： H01L21/76802 ,  H01L21/76286 ,  H01L21/76877 ,  H01L21/84 ,  H01L27/1203

    摘要： A semiconductor component includes a semiconductor body, in which are formed: a substrate of a first conduction type, a buried semiconductor layer of a second conduction type arranged on the substrate, and a functional unit semiconductor layer of a third conduction type arranged on the buried semiconductor layer, in which at least two semiconductor functional units arranged laterally alongside one another are provided. The buried semiconductor layer is part of at least one semiconductor functional unit, the semiconductor functional units being electrically insulated from one another by an isolation structure which permeates the functional unit semiconductor layer, the buried semiconductor layer, and the substrate. The isolation structure includes at least one trench and an electrically conductive contact to the substrate, the contact to the substrate being electrically insulated from the functional unit semiconductor layer and the buried layer by the at least one trench.

    摘要翻译： 半导体部件包括半导体本体，其中形成有：第一导电类型的衬底，布置在衬底上的第二导电类型的埋入半导体层，以及布置在埋置的第三导电类型的功能单元半导体层 半导体层，其中设置有横向彼此排列的至少两个半导体功能单元。 掩埋半导体层是至少一个半导体功能单元的一部分，半导体功能单元通过渗透功能单元半导体层，埋入半导体层和基板的隔离结构彼此电绝缘。 隔离结构包括至少一个沟槽和与衬底的导电接触，与衬底的接触通过至少一个沟槽与功能单元半导体层和掩埋层电绝缘。

    Method for producing a semiconductor structure, and use of the method
    26.
    发明授权
    Method for producing a semiconductor structure, and use of the method 失效
    半导体结构的制造方法以及使用该方法

    公开(公告)号：US06809019B2

    公开(公告)日：2004-10-26

    申请号：US10261849

    申请日：2002-09-30

    申请人： Walter Hartner ,  Matthias Krönke

    发明人： Walter Hartner ,  Matthias Krönke

    IPC分类号： H01L213205

    CPC分类号： H01L28/91

    摘要： A method for producing a semiconductor structure includes applying at least one first layer, etching the first layer using a masking layer such that fences are produced, and, after removal of the masking layer and application of an auxiliary layer, the auxiliary layer and the fences are removed jointly except for a predetermined extent of the auxiliary layer. The present invention also relates to use of the method for producing spacers in a semiconductor structure.

    摘要翻译： 一种制造半导体结构的方法包括：施加至少一个第一层，使用掩模层蚀刻第一层以产生栅栏，并且在去除掩模层和施加辅助层之后，辅助层和栅栏 除了辅助层的预定范围外联合除去。 本发明还涉及在半导体结构中制造间隔物的方法的用途。

    Recovery of electronic properties in process-damaged ferroelectrics by voltage-cycling
    30.
    发明授权
    Recovery of electronic properties in process-damaged ferroelectrics by voltage-cycling 失效
    通过电压循环恢复工艺损坏的铁电体中的电子特性

    公开(公告)号：US06171934B2

    公开(公告)日：2001-01-09

    申请号：US09144297

    申请日：1998-08-31

    申请人： Vikram Joshi ,  Narayan Solayappan ,  Walter Hartner ,  G{umlaut over (u)}nther Schindler

    发明人： Vikram Joshi ,  Narayan Solayappan ,  Walter Hartner ,  G{umlaut over (u)}nther Schindler

    IPC分类号： H01L21326

    CPC分类号： H01L27/11502 ,  H01L27/11507 ,  H01L28/55

    摘要： An integrated circuit is formed containing a metal-oxide ferroelectric thin film. An voltage-cycling recovery process is conducted to reverse the degradation of ferroelectric properties caused by hydrogen. The voltage-cycling recovery process is conducted by applying from 104 to 1011 voltage cycles with a voltage amplitude of from 1 to 15 volts. Conducting voltage-cycling at a higher temperature in the range 30-200° C. enhances recovery. Preferably the metal oxide thin film comprises layered superlattice material. Preferably the layered superlattice material comprises strontium bismuth tantalate or strontium bismuth tantalum niobate. If the integrated circuit manufacture includes a forming-gas anneal, then the voltage-cycling recovery process is performed after the forming-gas anneal. The voltage-cycling recovery process obviates oxygen-recovery annealing, and it allows continued use of conventional hydrogen-rich plasma processes and forming-gas anneals without the risk of permanent damage to the ferroelectric thin film.

    摘要翻译： 形成含有金属氧化物铁电体薄膜的集成电路。 进行电压循环恢复处理以逆转由氢引起的铁电性能的降低。 通过施加电压幅度为1至15伏特的104至1011个电压周期来执行电压循环恢复过程。 在30-200℃范围内的较高温度下进行电压循环，提高了回收率。 优选地，金属氧化物薄膜包括层状超晶格材料。 优选地，层状超晶格材料包括钽酸铋钽铋或铌酸铋钽酸铋。 如果集成电路制造包括成形气体退火，则在成形气体退火之后执行电压循环恢复过程。 电压循环恢复过程避免氧回收退火，并且其允许继续使用常规富氢等离子体工艺和形成气体退火，而不会对铁电薄膜造成永久损坏的风险。