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    Circuit arrangement including a common source sense-FET
    3.
    发明授权
    Circuit arrangement including a common source sense-FET 有权
    电路布置包括一个公共源极检测FET

    公开(公告)号：US08373449B2

    公开(公告)日：2013-02-12

    申请号：US12982641

    申请日：2010-12-30

    Applicant: Steffen Thiele ,  Andreas Meiser

    Inventor： Steffen Thiele ,  Andreas Meiser

    IPC: H02M1/00

    CPC classification number: G01R19/0092 ,  H03F2200/261 ,  H03F2200/462 ,  H03K2217/0027

    Abstract: A current sensing circuit arrangement is disclosed. The circuit arrangement includes a load transistor for controlling a load current to a load being coupled to a drain electrode of the load transistor. A sense transistor is coupled to the load transistor. The sense transistor has a drain electrode that provides a measurement current representative of the load current. The load transistor and the sense transistor are field effect transistors having a common source electrode. A measurement circuit is configured to receive the measurement current from the sense transistor and to generate an output signal therefrom, the output signal being representative of the load current.

    Abstract translation: 公开了一种电流感测电路装置。 电路装置包括负载晶体管，用于控制耦合到负载晶体管的漏电极的负载的负载电流。 感测晶体管耦合到负载晶体管。 感测晶体管具有提供表示负载电流的测量电流的漏电极。 负载晶体管和感测晶体管是具有公共源电极的场效应晶体管。 测量电路被配置为从感测晶体管接收测量电流并从其产生输出信号，该输出信号代表负载电流。

    PHOTOBIOREACTOR
    4.
    发明申请
    PHOTOBIOREACTOR 有权

    公开(公告)号：US20110124087A1

    公开(公告)日：2011-05-26

    申请号：US12812569

    申请日：2009-01-19

    Applicant: Andreas Meiser ,  Miguel Verhein

    Inventor： Andreas Meiser ,  Miguel Verhein

    IPC: C12N1/00 ,  C12M1/00

    CPC classification number: C12N1/12 ,  C12M21/02 ,  C12M23/26 ,  C12M23/34 ,  C12M23/52 ,  C12M23/56 ,  C12M25/06 ,  C12M41/12 ,  C12M41/32

    Abstract: A method of operating a closed photobioreactor for cultivation of phototrophic microorganisms. The photobioreactor comprises a culture liquid and is partially or completely surrounded by water of a water body. A density difference between the culture liquid and the surrounding water is provided so that the position of the photobioreactor in the water body is controlled. A closed photobioreactor for cultivation of phototrophic microorganisms. The photobioreactor is adapted to comprise a culture liquid and to be partially or completely surrounded by water of a water body. The photobioreactor comprises means for determining the density difference between the culture liquid and the surrounding water.

    Abstract translation: 一种操作闭合光生物反应器以培养光营养微生物的方法。 光生物反应器由培养液组成，部分或完全被水体的水包围。 提供培养液和周围水之间的密度差，使得水体中光生物反应器的位置受到控制。 用于培养光营养微生物的封闭光生物反应器。 光生物反应器适于包含培养液体并被水体的水部分或完全包围。 光生物反应器包括用于确定培养液和周围水之间的密度差的装置。

    Semiconductor structure and method
    5.
    发明授权
    Semiconductor structure and method 有权
    半导体结构与方法

    公开(公告)号：US07468307B2

    公开(公告)日：2008-12-23

    申请号：US11476497

    申请日：2006-06-28

    Applicant: Walter Hartner ,  Andreas Meiser ,  Hermann Gruber ,  Dietrich Bonart ,  Thomas Gross

    Inventor： Walter Hartner ,  Andreas Meiser ,  Hermann Gruber ,  Dietrich Bonart ,  Thomas Gross

    IPC: H01L21/76

    CPC classification number: H01L21/743 ,  H01L23/535 ,  H01L29/0653 ,  H01L29/7809 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.

    Abstract translation: 半导体结构包括半导体层堆叠，其包括第一导电类型的半导体衬底，第二导电类型的重掺杂掩埋层和形成在半导体层的顶部上的第三导电类型的单晶半导体层和埋入 层，与埋层的接触，在接触孔中形成的接触以及半导体结构的不同部分的横向绝缘，所述绝缘体形成在隔离沟槽中。 可以在隔离沟槽内形成与半导体衬底的接触。

    Semiconductor structure and method
    6.
    发明申请
    Semiconductor structure and method 有权
    半导体结构与方法

    公开(公告)号：US20070018195A1

    公开(公告)日：2007-01-25

    申请号：US11476497

    申请日：2006-06-28

    Applicant: Walter Hartner ,  Andreas Meiser ,  Hermann Gruber ,  Dietrich Bonart ,  Thomas Gross

    Inventor： Walter Hartner ,  Andreas Meiser ,  Hermann Gruber ,  Dietrich Bonart ,  Thomas Gross

    IPC: H01L29/74

    CPC classification number: H01L21/743 ,  H01L23/535 ,  H01L29/0653 ,  H01L29/7809 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A semiconductor structure includes a semiconductor layer stack includes a semiconductor substrate of a first conductivity type, a heavily-doped buried layer of a second conductivity type, and a monocrystalline semiconductor layer of a third conductivity type formed on top of the semiconductor layer and the buried layer, a contact to the buried layer, the contact formed in a contact hole, and a lateral insulation of different portions of the semiconductor structure, the insulation formed in an isolation trench. A contact to the semiconductor substrate may be formed within the isolation trench.

    Abstract translation: 半导体结构包括半导体层堆叠，其包括第一导电类型的半导体衬底，第二导电类型的重掺杂掩埋层和形成在半导体层的顶部上的第三导电类型的单晶半导体层和埋入 层，与埋层的接触，在接触孔中形成的接触以及半导体结构的不同部分的横向绝缘，所述绝缘体形成在隔离沟槽中。 可以在隔离沟槽内形成与半导体衬底的接触。

    Method for Producing a Controllable Semiconductor Component
    7.
    发明申请
    Method for Producing a Controllable Semiconductor Component 有权
    生产可控半导体元件的方法

    公开(公告)号：US20140073123A1

    公开(公告)日：2014-03-13

    申请号：US13614076

    申请日：2012-09-13

    Applicant: Andreas Meiser ,  Markus Zundel

    Inventor： Andreas Meiser ,  Markus Zundel

    IPC: H01L21/768 ,  H01L21/28

    CPC classification number: H01L29/7813 ,  H01L21/28008 ,  H01L21/28229 ,  H01L21/743 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/4916 ,  H01L29/495 ,  H01L29/51 ,  H01L29/66734 ,  H01L29/7827 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Disclosed is a method for producing a controllable semiconductor component. In a semiconductor body with a top side and a bottom side, a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body are formed in a common etching process. The first trench has a first width and the second trench has a second width greater than the first width. Then, in a common process, an oxide layer is formed in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench. Subsequently, the oxide layer is removed from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.

    Abstract translation: 公开了一种制造可控半导体部件的方法。 在具有顶侧和底侧的半导体本体中，在公共蚀刻工艺中形成从顶侧突出到半导体本体的第一沟槽和从顶侧突出到半导体本体中的第二沟槽。 第一沟槽具有第一宽度，第二沟槽具有大于第一宽度的第二宽度。 然后，在共同的工艺中，在第一沟槽和第二沟槽中形成氧化物层，使得氧化物层填充第一沟槽并使第二沟槽的表面电绝缘。 随后，完全或至少部分地从第一沟槽去除氧化物层，使得半导体主体包括布置在第一沟槽中的暴露的第一表面区域。

    Current Sense Transistor with Embedding of Sense Transistor Cells
    9.
    发明申请
    Current Sense Transistor with Embedding of Sense Transistor Cells 有权
    电流检测晶体管嵌入感应晶体管电池

    公开(公告)号：US20140015046A1

    公开(公告)日：2014-01-16

    申请号：US13549463

    申请日：2012-07-14

    Applicant: Steffen THIELE ,  Andreas MEISER ,  Markus ZUNDEL

    Inventor： Steffen THIELE ,  Andreas MEISER ,  Markus ZUNDEL

    IPC: H01L29/78 ,  H01L21/336

    CPC classification number: H01L29/7815 ,  G01R19/0092 ,  H01L23/58 ,  H01L27/124 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/7813 ,  H01L2924/0002 ,  H03K17/0822 ,  H03K2217/0027 ,  H01L2924/00

    Abstract: A semiconductor device a field of transistor cells integrated in a semiconductor body. A number of the transistor cells forming a power transistor and at least one of the transistor cells forming a sense transistor. A first source electrode is arranged on the semiconductor body electrically connected to the transistor cell(s) of the sense transistor but electrically isolated from the transistor cells of the power transistor. A second source electrode is arranged on the semiconductor body and covers the transistor cells of both the power transistor and the sense transistor, and at least partially covering the first source electrode in such a manner that the second source electrode is electrically connected only to the transistor cells of the power transistor but electrically isolated from the transistor cells of the sense transistor.

    Abstract translation: 一种半导体器件，集成在半导体本体中的晶体管单元的场。 形成功率晶体管的多个晶体管单元和形成感测晶体管的至少一个晶体管单元。 第一源电极布置在电连接到感测晶体管的晶体管单元的半导体本体上，但与功率晶体管的晶体管单元电隔离。 第二源电极布置在半导体本体上并覆盖功率晶体管和感测晶体管的晶体管单元，并且至少部分地覆盖第一源电极，使得第二源电极仅电连接到晶体管 功率晶体管的单元，但与感测晶体管的晶体管单元电隔离。

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