Abstract:
A display may include an optical film to promote sunglass-friendly viewing of the display. Displays may include linear polarizers. For example, a liquid crystal display may have a linear polarizer above a liquid crystal layer, whereas an organic light-emitting diode display may have a linear polarizer that forms a portion of a circular polarizer to reduce reflections in the display. Displays that emit linearly polarized light may not be compatible with polarized sunglasses. To ensure an optimal user experience for users wearing sunglasses, displays may include sunglass-friendly optical films. A sunglass-friendly optical film may be a film formed from a birefringent material such as a polymer or liquid crystal. The sunglass-friendly optical film may have an optical axis that is at a 45° angle relative to the optical axis of the underlying linear polarizer. The sunglass-friendly optical film may be patterned to have reduced thickness regions.
Abstract:
Liquid crystal display systems and methods of operation are described. In an embodiment, a liquid crystal display pixel cell includes an insulation layer spanning over a passivation layer and the plurality of signal electrodes such that it separates the signal electrodes from polymer alignment layer for the liquid crystal. In an embodiment, a method of operating a liquid crystal display panel includes temporal compensation of the Vcom value as a function of time and one or more operating parameters.
Abstract:
System and method for improving displayed image quality of an electronic display that displays a first image frame by applying a first voltage to a display pixel and a second image frame directly before the first image frame by applying a second voltage to the display pixel. A display pipeline is communicatively coupled to the electronic display and receives first image data corresponding with the first image frame, where the image data includes a first grayscale value corresponding with the display pixel. Additionally the display pipeline determines an inversion balancing grayscale offset based at least in part on the first grayscale value when polarity of the first voltage and polarity of the second voltage are the same and determines magnitude of the first voltage by applying the inversion balancing grayscale offset to the first grayscale value to reduce likelihood of a perceivable luminance spike when displaying the first image frame.
Abstract:
Systems and methods are provided for improving displayed image quality of an electronic display that includes a display pixel. The electronic display displays a first image frame directly after a second image frame by applying an analog electrical signal to the display pixel. To facilitate display of the first image frame, circuitry receives image data corresponding to the image frame, in which the image data includes a grayscale value that indicates target luminance of the display pixel; determines expected refresh rate of the first image frame based at least in part on actual refresh rate of the second image frame; determines a pixel response correction offset based at least in part on the expected refresh rate of the first image frame; and determines processed image data by applying the pixel response correction offset to the grayscale value, in which the processed image data indicates magnitude of the analog electrical signal.
Abstract:
A display may have upper and lower display layers. A layer of liquid crystal material may be interposed between the upper and lower display layers. The display layers may have substrates. A thin-film transistor layer may have a layer of thin-film transistor structures on a substrate such as a clear glass layer. A planarization layer may be formed on the thin-film transistor structures. A transparent conductive layer may be formed on the planarization layer. The display may have a dielectric layer on the transparent conductive layer. Pixels may be formed in the display layers. The pixels may include pixel electrodes having fingers. The fingers may be formed on the dielectric layer. Trenches in the dielectric layer may be formed between the fingers. The trenches may extend to the transparent conductive layer or may be formed only partway into the dielectric layer.
Abstract:
One embodiment describes an electronic display. The electronic display includes display driver circuitry that display an image frame on the electronic device using a first display pixel and a second display pixel, touch sensing circuitry that detect user interaction with the electronic display, and a timing controller. The timing controller receives image data, in which the image data describes a target grayscale value of the first pixel and the second pixel to display the image frame, instructs the display driver circuitry to display a first portion of the image frame by writing the image data to the first display pixel, instructs the touch sensing circuitry to determine whether a user touch is present on a surface of the electronic display after the first portion of the image frame is displayed, determines grayscale value displayed by the second display pixel to display a previous image frame, and instructs the display driver circuitry to display a second portion of the image frame by writing adjusted image data to the second display pixel when the displayed grayscale value differs from the target grayscale value of the second pixel by more than a threshold amount.
Abstract:
A display may have an array of pixels. The display may be controlled using display driver circuitry. The display driver circuitry may analyze image data to be displayed on the array. When static content is detected, the rate at which the pixels are refreshed may be adjusted to conserve power. If a static image is detected, the gate lines may be asserted at a lower refresh rate than if moving content is detected. To avoid visible artifacts, the display driver circuitry may use temporal and spatial refresh rate buffers. Temporal buffers ensure that refresh rates are changed gradually as a function of time, thereby minimizing flicker. Spatial refresh rate buffers are used to provide a smooth transition between low refresh rate and high refresh rate regions in a display as a function of position.
Abstract:
A display may have upper and lower display layers. A layer of liquid crystal material may be interposed between the upper and lower display layers. The display layers may have substrates. A thin-film transistor layer may have a layer of thin-film transistor structures on a substrate such as a clear glass layer. A planarization layer may be formed on the thin-film transistor structures. A transparent conductive layer may be formed on the planarization layer The display may have a dielectric layer on the transparent conductive layer. Pixels may be formed in the display layers. The pixels may include pixel electrodes having fingers. The fingers may be formed on the dielectric layer. Trenches in the dielectric layer may be formed between the fingers. The trenches may extend to the transparent conductive layer or may be formed only partway into the dielectric layer.
Abstract:
A display may have a layer of liquid crystal material between a color filter layer and a thin-film transistor layer. Column spacer structures may be formed between the color filter layer and the thin-film transistor layer to maintain a desired separation between the color filter and thin-film transistor layers. The column spacer structures may be formed from polymer structures such as photoresist pillars and may include metal pads. The metal pads may be formed on the upper surface of the thin-film transistor layer or the lower surface of the color filter layer. The photoresist pillars may be formed on a surface in the display such as the lower surface of the color filter layer. Column spacer structures may include main spacer structures, subspacer structures, and intermediate thickness spacer structures to enhance pooling mura and light leakage performance.
Abstract:
Display ground plane structures may contain slits. Image pixel electrodes in the display may be arranged in rows and columns. Image pixels in the display may be controlled using gate lines that are associated with the rows and data lines that are associated with the columns. An electric field may be produced by each image pixel electrode that extends through a liquid crystal layer to an associated portion of the ground plane. The slits in the ground plane may have a slit width. Data lines may be located sufficiently below the ground plane and sufficiently out of alignment with the slits to minimize crosstalk from parasitic electric fields. A three-column inversion scheme may be used when driving data line signals into the display, so that pairs of pixels that straddle the slits are each driven with a common polarity. Gate line scanning patterns may be used that enhance display uniformity.