公开(公告)号：US20090031260A1

公开(公告)日：2009-01-29

申请号：US11782747

申请日：2007-07-25

申请人： Matthew Angyal ,  Alina Deutsch ,  Ibrahim M. Elfadel ,  Raminderpal Singh ,  Theodorus E. Standaert ,  Wayne H. Woods

发明人： Matthew Angyal ,  Alina Deutsch ,  Ibrahim M. Elfadel ,  Raminderpal Singh ,  Theodorus E. Standaert ,  Wayne H. Woods

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/10

摘要： A method, computer program and system for the optimization of semiconductor process parameters given a pre-specified set of targets and constraints on electrical performance metrics are disclosed. Semiconductor process engineers who are not expert in the art of electrical analysis or mathematical optimization can readily use the method of this invention in optimizing semiconductor process parameters. Accommodates the differences in design styles, metal layer routing, and electrical metrics using priority schedules that are easy to input and understand. Enables the exploration of the process parameter space using primitive process tolerances and accurate electrical information provided by field solvers and circuit analysis programs.

摘要翻译： 公开了一种用于优化半导体工艺参数的方法，计算机程序和系统，给出了预定指定的一组目标和对电性能度量的约束。 不是电气分析或数学优化领域的专家的半导体工艺工程师可以容易地使用本发明的方法优化半导体工艺参数。 使用易于输入和理解的优先级调度，适应设计风格，金属层布线和电气指标的差异。 使用原始过程公差和现场求解器和电路分析程序提供的准确电气信息来探索过程参数空间。

公开(公告)号：US20050177325A1

公开(公告)日：2005-08-11

申请号：US10776716

申请日：2004-02-11

申请人： Alina Deutsch ,  Peter Feldmann ,  Albert Ruehli ,  Howard Smith

发明人： Alina Deutsch ,  Peter Feldmann ,  Albert Ruehli ,  Howard Smith

IPC分类号： G01R15/00 ,  G01R31/28

CPC分类号： G01R31/2813

摘要： A system and method for analyzing a circuit with transmission lines includes determining which sources influence each of a plurality of transmission lines, based on coupling factors. Transmission line parameters are computed based on the sources, which influence each transmission line. A transient response or frequency response is analyzed for each transmission line by segmenting each line to perform an analysis on that line. The step of analyzing is repeated using waveforms determined in a previous iteration until convergence to a resultant waveform has occurred.

摘要翻译： 用于使用传输线分析电路的系统和方法包括基于耦合因素来确定哪些源影响多条传输线中的每一条。 传输线参数是基于影响每条传输线的源计算的。 通过分割每行来对每条传输线分析瞬态响应或频率响应，以对该行进行分析。 使用在先前迭代中确定的波形重复分析步骤，直到已经发生收敛到合成波形。

公开(公告)号：US06205571B1

公开(公告)日：2001-03-20

申请号：US09222143

申请日：1998-12-29

申请人： Peter J. Camporese ,  Alina Deutsch ,  Timothy Gerard McNamara ,  Phillip John Restle ,  David Allan Webber

发明人： Peter J. Camporese ,  Alina Deutsch ,  Timothy Gerard McNamara ,  Phillip John Restle ,  David Allan Webber

IPC分类号： G06F1750

CPC分类号： G06F1/10 ,  G06F17/5077

摘要： An X-Y grid tree clock distribution network for distributing a clock signal across a VLSI chip. Tunable wiring tree networks are combined with an X-Y grid vertically and horizontally connecting all the tree end points. No drivers are necessary at connection points of the tree end points to the X-Y grid. The final X-Y grid distributes the clock signal close to every place it is needed, and reduces skew across local regions. A tuning method allows buffering of the clock signal, while minimizing both nominal clock skew and clock uncertainty. The tuned tree networks provide low skew even with variations in clock load density and non-ideal buffer placement, while minimizing the number of buffers needed. The tuning method first represents a total capacitance of one or more of clock pin loads and twig wiring as a clustered grid load. Next, a smoothing of the clustered grid loads approximates the effect of the X-Y grid. Electrical simulation models are created for network components and clustered grid loads are substituted with smoothed clustered grid loads. A set of NSECTOR electrical net lists are next created by extracting a net list with associated X-Y grid wires cut to isolate each sector net list from its neighboring sectors. Each NSECTOR electrical net list is then tuned, wherein the smoothed clustered grid loads represent an approximation of the effects of the neighboring sectors of each NSECTOR electrical net list.

摘要翻译： 一个用于在VLSI芯片上分配时钟信号的X-Y网格树时钟分配网络。 可调式接线树网络与X-Y网格结合，垂直和水平连接所有树端点。 在X-Y网格的树端点的连接点不需要驱动程序。 最后的X-Y网格将时钟信号分配到每个需要的地方，并减少局部区域的偏差。 调谐方法允许缓冲时钟信号，同时最小化标称时钟偏移和时钟不确定度。 调谐树网络即使在时钟负载密度和非理想缓冲器放置的变化下也提供低偏移，同时最小化所需的缓冲器数量。 调谐方法首先表示作为集群电网负载的一个或多个时钟引脚负载和布线布线的总电容。 接下来，聚类网格负载的平滑近似于X-Y网格的效果。 为网络组件创建电气仿真模型，并且使用平滑的集群网格负载代替集群网格负载。 接下来通过提取具有相关联的X-Y网格线的网络列表来创建一组NSECTOR电网列表，以将每个扇区网络列表与其相邻扇区隔离。 然后调整每个NSECTOR电网列表，其中平滑的集群网格负载表示每个NSECTOR电网列表的相邻扇区的影响的近似值。

公开(公告)号：US4933635A

公开(公告)日：1990-06-12

申请号：US288390

申请日：1988-12-22

申请人： Alina Deutsch ,  Modest M. Oprysko ,  John J. Ritsko ,  Laura B. Rothman ,  Helen L. Yeh ,  Atilio Zupicich

发明人： Alina Deutsch ,  Modest M. Oprysko ,  John J. Ritsko ,  Laura B. Rothman ,  Helen L. Yeh ,  Atilio Zupicich

IPC分类号： H01L21/66 ,  G01R31/28 ,  H01L23/544

CPC分类号： H01L22/34 ,  G01R31/2818 ,  H01L2224/16 ,  H01L2924/01014 ,  H01L2924/01037 ,  H01L2924/15192 ,  H01L2924/3011

摘要： A thin film region 14 of a multichip carrier 10 is provided with at least one fabrication process or tooling monitor for monitoring the quality of the fabrication process during the sequential formation of the layers of the region 14. The process monitor is formed with a desired layer or layers of the thin film region, such as by a photolithographic process. A centrally disposed active wiring region 30 of a layer is surrounded by peripherally disposed fabrication monitor sites 32. The sites 32 can be located such that they do not occupy or interfere with the surface area required for the wiring region 30 while still being disposed near enough to the wiring region such that the electrical and physical characteristics of the thin film is substantially the same. Four different types of thin film fabrication process monitors are disclosed, including a line/via monitor, a dielectric monitor, a laser assisted repair monitor and a laser assisted engineering change monitor.

公开(公告)号：US20090164183A1

公开(公告)日：2009-06-25

申请号：US12037753

申请日：2008-02-26

申请人： Howard Smith ,  Lijun Jiang ,  Alina Deutsch ,  Kaushik Chanda ,  Barry Jay Rubin ,  Jason Gill ,  Seshadri K. Kolluri

发明人： Howard Smith ,  Lijun Jiang ,  Alina Deutsch ,  Kaushik Chanda ,  Barry Jay Rubin ,  Jason Gill ,  Seshadri K. Kolluri

IPC分类号： G06G7/122

CPC分类号： G06F17/5036 ,  G06F17/5018 ,  G06F2217/80

摘要： A method and apparatus for thermal modeling of on-chip interconnects using electromagnetic tools to determine a temperature profile across the interconnect structure and the temperature at each node of an equivalent thermal circuit derived from an electrical model.

摘要翻译： 一种用于使用电磁工具来确定跨互连结构的温度分布和来自电气模型的等效热电路的每个节点处的温度的片上互连的热建模的方法和装置。

公开(公告)号：US20080072189A1

公开(公告)日：2008-03-20

申请号：US11942270

申请日：2007-11-19

申请人： Michael Bowen ,  Alina Deutsch ,  Gerard Kopcsay ,  Byron Krauter ,  Barry Rubin ,  Howard Smith ,  David Widiger

发明人： Michael Bowen ,  Alina Deutsch ,  Gerard Kopcsay ,  Byron Krauter ,  Barry Rubin ,  Howard Smith ,  David Widiger

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： An integrated circuit chip has new Frequency dependent RLC extraction and modeling providing on chip integrity and noise verification and the extraction and modeling employs: A) 2D scan line algorithm for the collection of adjacent signal and power conductor coordinates; B) In core pair-wise frequency Dependent RL extraction; C) In core equivalent circuit synthesis; D) caching and partitioning RL extraction techniques for run time efficiency; and E) Techniques for synthesizing stable circuits to represent frequency dependent RL circuits for non-mono tonic R12.

摘要翻译： 集成电路芯片具有新的频率相关RLC提取和建模，提供片上完整性和噪声验证，提取和建模采用：A）用于收集相邻信号和电源导线坐标的2D扫描线算法; B）在核心配对频率从属RL提取中; C）在核心等效电路合成中; D）缓存和分区RL提取技术，用于运行时效率; 和E）用于合成稳定电路以表示用于非单音增益R 12的频率相关RL电路的技术。

公开(公告)号：US20050218908A1

公开(公告)日：2005-10-06

申请号：US10818578

申请日：2004-04-06

申请人： Alina Deutsch ,  Gerard Kopcsay ,  Byron Krauter ,  Barry Rubin ,  Howard Smith

发明人： Alina Deutsch ,  Gerard Kopcsay ,  Byron Krauter ,  Barry Rubin ,  Howard Smith

IPC分类号： G01R21/00 ,  G01R29/26 ,  G01R31/317 ,  G05B24/02 ,  G05F1/00 ,  G06F17/50 ,  H01L23/522 ,  H01L23/528 ,  H02J1/00 ,  H02J3/12 ,  H02J3/18

CPC分类号： G01R31/31721 ,  H01L23/5225 ,  H01L23/5286 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： The present invention relates to a method for analyzing the noise prediction within one or more electrical circuits, wherein the electrical circuits have a power mesh grid distribution system that feeds power levels to the electrical circuits that are connected by signal wires. After identifying a driver and receiver electrical circuit to be analyzed, a power block is generated that is associated with the driver and receiver electrical circuit by partitioning an area of a power mesh grid distribution system into a power block that can be modeled with lossy transmission line techniques. Next, signal wires situated between the driver and receiver electrical circuits are partitioned into signal blocks that can be modeled with lossy transmission line techniques. Lastly, the power blocks and signal blocks associated with the electrical circuits are analyzed in order to predict the noise performance within the electrical circuits.

摘要翻译： 本发明涉及一种用于分析一个或多个电路内的噪声预测的方法，其中电路具有功率网格分布系统，其将功率电平馈送到通过信号线连接的电路。 在识别要分析的驱动器和接收器电路之后，通过将功率网格分布系统的区域划分成可以用有损传输线建模的功率块来产生与驱动器和接收器电路相关联的功率块 技术 接下来，位于驱动器和接收器电路之间的信号线被分割成可以用有损传输线技术建模的信号块。 最后，分析与电路相关联的功率块和信号块，以便预测电路内的噪声性能。

公开(公告)号：US5534094A

公开(公告)日：1996-07-09

申请号：US314789

申请日：1994-09-29

申请人： Gnanalingam Arjavalingam ,  Alina Deutsch ,  Fuad E. Doany ,  Bruce K. Furman ,  Donald J. Hunt ,  Chandrasekhar Narayan ,  Modest M. Oprysko ,  Sampath Purushothaman ,  Vincent Ranieri ,  Stephen Renick ,  Jane M. Shaw ,  Janusz S. Wilczynski ,  David F. Witman

发明人： Gnanalingam Arjavalingam ,  Alina Deutsch ,  Fuad E. Doany ,  Bruce K. Furman ,  Donald J. Hunt ,  Chandrasekhar Narayan ,  Modest M. Oprysko ,  Sampath Purushothaman ,  Vincent Ranieri ,  Stephen Renick ,  Jane M. Shaw ,  Janusz S. Wilczynski ,  David F. Witman

IPC分类号： B23K26/00 ,  B32B37/00 ,  H01L21/68 ,  H01L23/12 ,  H01L23/15 ,  H05K3/00 ,  H05K3/46 ,  B32B31/28

CPC分类号： H01L21/6835 ,  H01L2221/68345 ,  H01L2221/68359 ,  H05K3/0011 ,  H05K3/46 ,  Y10T156/1158 ,  Y10T428/12528 ,  Y10T428/12549 ,  Y10T428/12569 ,  Y10T428/12611

摘要： A method and apparatus for releasing a workpiece from a substrate including providing a substrate which is transparent to a predetermined wavelength of electromagnetic radiation; forming, on the substrate, a separation layer which degrades in response to the predetermined radiation; providing the workpiece on the separation layer; and directing the predetermined radiation at the separation layer through the transparent substrate so as to degrade the separation layer and to separate the workpiece from the substrate.

摘要翻译： 一种用于从衬底释放工件的方法和装置，包括提供对预定波长的电磁辐射是透明的衬底; 在衬底上形成响应于预定辐射而降解的分离层; 在分离层上提供工件; 并且通过透明基板将分离层处的预定辐射引导，以使分离层退化并将工件与基板分离。