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    Error diffusion and grid shift in lithography
    21.
    发明授权
    Error diffusion and grid shift in lithography 有权
    光刻中的误差扩散和栅格位移

    公开(公告)号：US08510687B1

    公开(公告)日：2013-08-13

    申请号：US13409765

    申请日：2012-03-01

    Applicant: Pei-Yi Liu ,  Shy-Jay Lin ,  Wen-Chuan Wang ,  Jaw-Jung Shin ,  Burn Jeng Lin

    Inventor： Pei-Yi Liu ,  Shy-Jay Lin ,  Wen-Chuan Wang ,  Jaw-Jung Shin ,  Burn Jeng Lin

    IPC: G06F17/50

    CPC classification number: G03F1/36

    Abstract: The present disclosure involves a method of data preparation in lithography processes. The method of data preparation includes providing an integrated circuit (IC) layout design in a graphic database system (GDS) grid, and converting the IC layout design GDS grid to a second exposure grid by applying an error diffusion and a grid shift technique to a sub-pixel exposure grid.

    Abstract translation: 本公开涉及在光刻工艺中的数据准备方法。 数据准备的方法包括在图形数据库系统（GDS）网格中提供集成电路（IC）布局设计，并且通过向第二曝光网格应用误差扩散和网格移位技术将IC布局设计GDS网格转换为第二曝光网格 子像素曝光网格。

    Multiple-Patterning Overlay Decoupling Method
    22.
    发明申请
    Multiple-Patterning Overlay Decoupling Method 有权
    多重图案叠加去耦方法

    公开(公告)号：US20130157389A1

    公开(公告)日：2013-06-20

    申请号：US13328264

    申请日：2011-12-16

    Applicant: Wen-Chuan Wang ,  Shy-Jay Lin ,  Pei-Yi Liu ,  Jaw-Jung Shin ,  Burn Jeng Lin

    Inventor： Wen-Chuan Wang ,  Shy-Jay Lin ,  Pei-Yi Liu ,  Jaw-Jung Shin ,  Burn Jeng Lin

    IPC: H01L21/66

    CPC classification number: G03F7/70633 ,  H01L23/544 ,  H01L2223/5442 ,  H01L2223/54426 ,  H01L2223/54453 ,  H01L2223/5446 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: A method for fabricating a semiconductor device is disclosed. An exemplary method includes forming a first structure in a first layer by a first exposure and determining placement information of the first structure. The method further includes forming a second structure in a second layer overlying the first layer by a second exposure and determining placement information of the second structure. The method further includes forming a third structure including first and second substructures in a third layer overlying the second layer by a third exposure. Forming the third structure includes independently aligning the first substructure to the first structure and independently aligning the second substructure to the second structure

    Abstract translation: 公开了一种制造半导体器件的方法。 一种示例性方法包括通过第一曝光在第一层中形成第一结构并确定第一结构的放置信息。 该方法还包括通过第二曝光在覆盖第一层的第二层中形成第二结构，并确定第二结构的放置信息。 该方法还包括在第三层中形成第三结构，该第三结构包括通过第三次曝光覆盖第二层的第三层中的第一和第二子结构。 形成第三结构包括将第一子结构独立地对准第一结构并且将第二子结构独立地对准到第二结构

    Method for metal correlated via split for double patterning
    23.
    发明授权
    Method for metal correlated via split for double patterning 有权
    用于双重图案化的金属相互分离的方法

    公开(公告)号：US08381139B2

    公开(公告)日：2013-02-19

    申请号：US13006608

    申请日：2011-01-14

    Applicant: Burn Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Wen-Chun Huang

    Inventor： Burn Jeng Lin ,  Tsai-Sheng Gau ,  Ru-Gun Liu ,  Wen-Chun Huang

    IPC: G06F17/50

    CPC classification number: H01L22/10 ,  G03F1/70 ,  G03F7/70433 ,  G03F7/70466 ,  G06F17/5036 ,  G06F17/5072 ,  G06F17/5081 ,  H01L21/31144 ,  H01L23/5226 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: The embodiments of via mask splitting methods for double patterning technology described enable via patterning to align to a metal layer underneath or overlying to reduce overlay error and to increase via landing. If adjacent vias violate the G0-mask-split-rule for space or pitch (or both) between vias, the mask assignment of end vias are given higher priority to ensure good landing of end vias, since they are at higher risk of mislanding. The metal correlated via mask splitting methods enable better via performance, such as lower via resistance, and higher via yield.

    Abstract translation: 所描述的用于双重图案化技术的通孔掩模分裂方法的实施例使得能够经由图案化以对准下面的金属层或覆盖以减少覆盖误差并增加通过着陆。 如果相邻的通孔违反了通孔之间的空间或间距（或两者）的G0-掩模分割规则，则优先考虑末端通孔的掩模分配，以确保最终通孔的良好着陆，因为它们具有较高的误放置风险。 通过掩模分离方法相关的金属能够实现更好的通过性能，例如较低的通孔电阻和较高的通孔产量。

    Immersion lithography system using a sealed wafer bath
    24.
    发明授权
    Immersion lithography system using a sealed wafer bath 有权
    浸没光刻系统使用密封晶圆槽

    公开(公告)号：US08208116B2

    公开(公告)日：2012-06-26

    申请号：US11670860

    申请日：2007-02-02

    Applicant: Burn Jeng Lin ,  Ching-Yu Chang

    Inventor： Burn Jeng Lin ,  Ching-Yu Chang

    IPC: G03B27/52

    CPC classification number: G03B27/52 ,  G03F7/70341

    Abstract: Immersion lithography system and method using a sealed wafer bottom are described. One embodiment is an immersion lithography apparatus including a lens assembly comprising an imaging lens and a wafer stage for retaining a wafer beneath the lens assembly and comprising a seal ring for sealing a gap between a bottom edge of a wafer retained on the wafer stage and the wafer stage. The apparatus further includes a fluid tank for retaining immersion fluid, the fluid tank situated with respect to the wafer stage for enabling full immersion of the wafer retained on the wafer stage in the immersion fluid; a cover disposed over at least a portion of the fluid tank for providing a temperature-controlled, fluid-rich environment within the fluid tank; and at least one directional flow control fluid inlet surrounding the imaging lens for directing immersion fluid toward an edge of the wafer retained on the wafer stage closest to the imaging lens.

    Abstract translation: 描述了浸没光刻系统和使用密封晶片底部的方法。 一个实施例是一种浸没光刻设备，其包括透镜组件，该透镜组件包括成像透镜和用于将晶片保持在透镜组件下方的晶片台，并且包括密封环，用于密封保留在晶片台上的晶片的底部边缘与 晶圆台。 该装置还包括用于保持浸没流体的流体箱，相对于晶片台定位的流体箱，用于使保留在晶片台上的晶片能够完全浸入浸没流体中; 设置在所述流体箱的至少一部分上的盖，用于在所述流体箱内提供温度控制的，富含流体的环境; 以及围绕成像透镜的至少一个方向流量控制流体入口，用于将浸没流体引向保持在最靠近成像透镜的晶片台上的晶片的边缘。

    Apparatus for Method for Immersion Lithography
    25.
    发明申请
    Apparatus for Method for Immersion Lithography 有权
    浸没光刻方法的设备

    公开(公告)号：US20110261334A1

    公开(公告)日：2011-10-27

    申请号：US13176587

    申请日：2011-07-05

    Applicant: Burn Jeng Lin

    Inventor： Burn Jeng Lin

    IPC: G03B27/52

    CPC classification number: G02B7/028 ,  G02B7/04 ,  G03F7/70341

    Abstract: An apparatus for immersion lithography that includes an imaging lens which has a front surface, a fluid-containing wafer stage for supporting a wafer that has a top surface to be exposed positioned spaced-apart and juxtaposed to the front surface of the imaging lens, and a fluid that has a refractive index between about 1.0 and about 2.0 filling a gap formed in-between the front surface of the imaging lens and the top surface of the wafer. A method for immersion lithography can be carried out by flowing a fluid through a gap formed in-between the front surface of an imaging lens and a top surface of a wafer. The flow rate and temperature of the fluid can be controlled while particulate contaminants are filtered out by a filtering device.

    Abstract translation: 一种用于浸没式光刻的装置，其包括具有前表面的成像透镜，用于支撑晶片的含流体的晶片台，所述晶片载台具有被间隔开并与所述成像透镜的前表面并置的待暴露的顶表面;以及 具有约1.0至约2.0的折射率的流体填充在成像透镜的前表面和晶片的顶表面之间形成的间隙。 可以通过使流体流过形成在成像透镜的前表面和晶片的顶表面之间的间隙来进行浸没式光刻的方法。 可以控制流体的流速和温度，同时通过过滤装置将颗粒污染物过滤掉。

    METHOD AND APPARATUS FOR PLANARIZING A POLYMER LAYER
    27.
    发明申请
    METHOD AND APPARATUS FOR PLANARIZING A POLYMER LAYER 有权
    用于平面聚合物层的方法和装置

    公开(公告)号：US20090309253A1

    公开(公告)日：2009-12-17

    申请号：US12137259

    申请日：2008-06-11

    Applicant: Burn Jeng Lin

    Inventor： Burn Jeng Lin

    IPC: B28B11/08 ,  B28B1/00

    CPC classification number: H01L21/67092 ,  H01L21/31051 ,  H01L21/31058

    Abstract: A method for planarizing a polymer layer is provided which includes providing a substrate having the polymer layer formed thereon, providing a structure having a substantially flat surface, pressing the flat surface of the structure to a top surface of the polymer layer such that the top surface of the polymer layer substantially conforms to the flat surface of the structure, and separating the flat surface of the structure from the top surface of the polymer material layer.

    Abstract translation: 提供了一种用于平面化聚合物层的方法，其包括提供其上形成有聚合物层的基底，提供具有基本平坦表面的结构，将该结构的平坦表面压在聚合物层的顶表面上，使得顶表面 的聚合物层基本上符合结构的平坦表面，并且将结构的平坦表面与聚合物材料层的顶表面分离。

    System and Method for Direct Writing to a Wafer
    28.
    发明申请
    System and Method for Direct Writing to a Wafer 有权
    直接写入晶片的系统和方法

    公开(公告)号：US20090268184A1

    公开(公告)日：2009-10-29

    申请号：US12203494

    申请日：2008-09-03

    Applicant: Burn Jeng Lin ,  Jeng-Horng Chen ,  Shy-Jay Lin ,  Tsai-Sheng Gau

    Inventor： Burn Jeng Lin ,  Jeng-Horng Chen ,  Shy-Jay Lin ,  Tsai-Sheng Gau

    IPC: G03B27/54

    CPC classification number: G03F7/70383 ,  B82Y10/00 ,  B82Y40/00 ,  H01J37/3174

    Abstract: A direct-write (DW) exposure system is provided which includes a stage for holding a substrate and configured to scan the substrate along an axis during exposure, a data processing module for processing pattering data and generating instructions associated with the patterning data, and an exposure module that includes a plurality of beams that are focused onto the substrate such that the beams cover a width that is larger than a width of a field size and a beam controller that controls the plurality of beams in accordance with the instructions as the substrate is scanned along the axis. The widths are in a direction different from the axis.

    Abstract translation: 提供了一种直接写入（DW）曝光系统，其包括用于保持衬底并被配置为在曝光期间沿着轴扫描衬底的台，用于处理图案数据并产生与图案形成数据相关联的指令的数据处理模块，以及 曝光模块，其包括聚焦在基板上的多个光束，使得光束覆盖大于场大小的宽度的宽度;以及根据作为衬底的指令来控制多个光束的光束控制器 沿轴扫描。 宽度在与轴不同的方向。

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