Patterning process and photoresist with a photodegradable base
    21.
    发明授权
    Patterning process and photoresist with a photodegradable base 有权
    图案化工艺和光致抗蚀剂,具有可光降解基材

    公开(公告)号:US08658344B2

    公开(公告)日:2014-02-25

    申请号:US13534961

    申请日:2012-06-27

    摘要: A resist material and methods using the resist material are disclosed herein. An exemplary method includes forming a resist layer over a substrate, wherein the resist layer includes a polymer, a photoacid generator, an electron acceptor, and a photodegradable base; performing an exposure process that exposes portions of the resist layer with radiation, wherein the photodegradable base is depleted in the exposed portions of the resist layer during the exposure process; and performing an developing process on the resist layer.

    摘要翻译: 本文公开了抗蚀剂材料和使用抗蚀剂材料的方法。 一种示例性方法包括在衬底上形成抗蚀剂层,其中抗蚀剂层包括聚合物,光致酸产生剂,电子受体和可光降解的碱; 执行曝光处理,其用辐射曝光抗蚀剂层的一部分,其中光可降解碱在曝光过程中耗尽抗蚀剂层的曝光部分; 并对抗蚀剂层进行显影处理。

    Method for manipulating the topography of a film surface
    22.
    发明授权
    Method for manipulating the topography of a film surface 有权
    操纵膜表面形貌的方法

    公开(公告)号:US07279267B2

    公开(公告)日:2007-10-09

    申请号:US10644356

    申请日:2003-08-19

    IPC分类号: G03F7/26

    摘要: A method for selectively altering a thickness of a radiation sensitive polymer layer including providing a substrate including at least one radiation sensitive polymer layer having a first thickness topography; exposing the at least one radiation sensitive polymer layer through a mask having a predetermined radiant energy transmittance distribution to selectively expose predetermined areas of the at least one sensitive polymer layer to predetermined radiant energy dosages; and, developing the at least one radiation sensitive polymer layer to alter the first thickness topography of the at least one radiation sensitive polymer layer to produce a second thickness topography.

    摘要翻译: 一种用于选择性地改变辐射敏感聚合物层的厚度的方法,包括提供包括具有第一厚度形貌的至少一个辐射敏感聚合物层的基底; 使所述至少一个辐射敏感聚合物层通过具有预定辐射能透射率分布的掩模曝光,以选择性地将所述至少一个敏感聚合物层的预定区域暴露于预定的辐射能量剂量; 以及显影所述至少一个辐射敏感聚合物层以改变所述至少一个辐射敏感聚合物层的第一厚度形貌以产生第二厚度拓扑。

    MULTIPLE EDGE ENABLED PATTERNING
    23.
    发明申请
    MULTIPLE EDGE ENABLED PATTERNING 有权
    多边形启用方式

    公开(公告)号:US20120074400A1

    公开(公告)日:2012-03-29

    申请号:US12892403

    申请日:2010-09-28

    IPC分类号: H01L23/544 G03F7/20

    摘要: Provided is an alignment mark having a plurality of sub-resolution elements. The sub-resolution elements each have a dimension that is less than a minimum resolution that can be detected by an alignment signal used in an alignment process. Also provided is a semiconductor wafer having first, second, and third patterns formed thereon. The first and second patterns extend in a first direction, and the third pattern extend in a second direction perpendicular to the first direction. The second pattern is separated from the first pattern by a first distance measured in the second direction. The third pattern is separated from the first pattern by a second distance measured in the first direction. The third pattern is separated from the second pattern by a third distance measured in the first direction. The first distance is approximately equal to the third distance. The second distance is less than twice the first distance.

    摘要翻译: 提供具有多个次分辨率元素的对准标记。 子分辨率元素各自具有小于可由对准过程中使用的对准信号检测的最小分辨率的维度。 还提供了其上形成有第一,第二和第三图案的半导体晶片。 第一和第二图案在第一方向上延伸,并且第三图案沿垂直于第一方向的第二方向延伸。 第二图案与第一图案分离在第二方向上测量的第一距离。 第三图案与第一图案分离在第一方向上测量的第二距离。 第三图案与第二图案分离在第一方向上测量的第三距离。 第一距离近似等于第三距离。 第二距离小于第一距离的两倍。

    Removal of line end shortening in microlithography and mask set for removal
    24.
    发明授权
    Removal of line end shortening in microlithography and mask set for removal 有权
    在微光刻和掩模组中去除线端缩短以进行去除

    公开(公告)号:US06492073B1

    公开(公告)日:2002-12-10

    申请号:US09839926

    申请日:2001-04-23

    IPC分类号: G03F900

    摘要: A mask set of two masks and a method of using these masks in a double exposure to avoid line shortening due to optical proximity effects is described. A pattern having pattern elements comprising a number of line segments, wherein each of the line segments has one or two free ends which are not connected to other mask pattern elements is to be transferred to a layer of resist. A first mask is formed by adding line extensions to each of the free ends of the line segments. A cutting mask is formed comprising rectangles enclosing each of the line extensions wherein one of the sides of said rectangles is coincident with the corresponding free end of said line segment. The first mask has opaque regions corresponding to the extended line segments. The cutting mask has transparent regions corresponding to the cutting pattern. In another embodiment a pattern having pattern openings comprising a number of line segments. In this embodiment the cutting pattern comprises rectangles having the same width as said line segments and add length to the line segments.

    摘要翻译: 描述了两个掩模的掩模组和在双重曝光中使用这些掩模以避免由于光学邻近效应引起的线缩短的方法。 具有包括多个线段的图形元素的图案,其中每个线段具有未连接到其它掩模图案元件的一个或两个自由端将被转移到抗蚀剂层。 通过向线段的每个自由端添加线延伸来形成第一掩模。 形成切割掩模,其包括围绕每个线延伸的矩形,其中所述矩形的一个侧面与所述线段的对应的自由端重合。 第一掩模具有对应于延伸线段的不透明区域。 切割掩模具有对应于切割图案的透明区域。 在另一个实施例中,具有包括多个线段的图案开口的图案。 在该实施例中,切割图案包括具有与所述线段相同宽度的矩形,并且对线段增加长度。

    Multiple edge enabled patterning
    25.
    发明授权
    Multiple edge enabled patterning 有权
    多边缘启用图案化

    公开(公告)号:US08730473B2

    公开(公告)日:2014-05-20

    申请号:US12892403

    申请日:2010-09-28

    IPC分类号: G01B11/00 H01L21/76 H01L23/58

    摘要: Provided is an alignment mark having a plurality of sub-resolution elements. The sub-resolution elements each have a dimension that is less than a minimum resolution that can be detected by an alignment signal used in an alignment process. Also provided is a semiconductor wafer having first, second, and third patterns formed thereon. The first and second patterns extend in a first direction, and the third pattern extend in a second direction perpendicular to the first direction. The second pattern is separated from the first pattern by a first distance measured in the second direction. The third pattern is separated from the first pattern by a second distance measured in the first direction. The third pattern is separated from the second pattern by a third distance measured in the first direction. The first distance is approximately equal to the third distance. The second distance is less than twice the first distance.

    摘要翻译: 提供具有多个次分辨率元素的对准标记。 子分辨率元素各自具有小于可由对准过程中使用的对准信号检测的最小分辨率的维度。 还提供了其上形成有第一,第二和第三图案的半导体晶片。 第一和第二图案在第一方向上延伸,并且第三图案沿垂直于第一方向的第二方向延伸。 第二图案与第一图案分离在第二方向上测量的第一距离。 第三图案与第一图案分离在第一方向上测量的第二距离。 第三图案与第二图案分离在第一方向上测量的第三距离。 第一距离近似等于第三距离。 第二距离小于第一距离的两倍。

    EFFICIENT SCAN FOR E-BEAM LITHOGRAPHY
    26.
    发明申请
    EFFICIENT SCAN FOR E-BEAM LITHOGRAPHY 有权
    E-BEAM LITHOGRAPHY的高效扫描

    公开(公告)号:US20130320243A1

    公开(公告)日:2013-12-05

    申请号:US13484524

    申请日:2012-05-31

    IPC分类号: G21K5/10

    摘要: The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.

    摘要翻译: 本公开提供了一种通过电子束光刻系统增加晶片通过量的方法。 该方法包括使用电子束写入器的最大扫描狭缝宽度(MSSW)扫描晶片。 通过限制集成电路(IC)场尺寸以允许MSSW覆盖整个场,MSSW被应用于减小晶片的扫描通道,从而增加吞吐量。 当用MSSW扫描晶片时,下一个扫描通道数据可以重新排列并加载到存储器缓冲器中。 因此,一旦一个扫描通道完成,读取存储器缓冲器中的下一个扫描通道数据进行扫描。

    High-volume manufacturing massive e-beam maskless lithography system
    27.
    发明授权
    High-volume manufacturing massive e-beam maskless lithography system 有权
    大批量生产大规模电子束无掩模光刻系统

    公开(公告)号:US08143602B2

    公开(公告)日:2012-03-27

    申请号:US12411229

    申请日:2009-03-25

    IPC分类号: G21K5/08

    摘要: The present disclosure provides a maskless lithography apparatus. The apparatus includes a plurality of writing chambers, each including: a wafer stage operable to secure a wafer to be written and a multi-beam module operable to provide multiple radiation beams for writing the wafer; an interface operable to transfer wafers between each of the writing chambers and a track unit for processing an imaging layer to the wafers; and a data path operable to provide a set of circuit pattern data to each of the multiple radiation beams in each of the writing chambers.

    摘要翻译: 本公开提供一种无掩模光刻设备。 该装置包括多个写入室,每个写入室包括:可操作以固定要写入的晶片的晶片台和可操作以提供用于写入晶片的多个辐射束的多光束模块; 可操作以在每个写入室之间传送晶片的接口和用于将成像层处理到晶片的轨道单元; 以及数据路径,其可操作以向每个写入室中的每个多个辐射束提供一组电路图案数据。

    Efficient scan for E-beam lithography
    28.
    发明授权
    Efficient scan for E-beam lithography 有权
    电子束光刻的高效扫描

    公开(公告)号:US08987689B2

    公开(公告)日:2015-03-24

    申请号:US13484524

    申请日:2012-05-31

    IPC分类号: A61N5/00

    摘要: The present disclosure provides a method of increasing the wafer throughput by an electron beam lithography system. The method includes scanning a wafer using the maximum scan slit width (MSSW) of the electron beam writer. By constraining the integrated circuit (IC) field size to allow the MSSW to cover a complete field, the MSSW is applied to decrease the scan lanes of a wafer and thereby increase the throughput. When scanning the wafer with the MSSW, the next scan lane data can be rearranged and loaded into a memory buffer. Thus, once one scan lane is finished, the next scan lane data in the memory buffer is read for scanning.

    摘要翻译: 本公开提供了一种通过电子束光刻系统增加晶片通过量的方法。 该方法包括使用电子束写入器的最大扫描狭缝宽度(MSSW)扫描晶片。 通过限制集成电路(IC)场尺寸以允许MSSW覆盖整个场,MSSW被应用于减小晶片的扫描通道,从而增加吞吐量。 当用MSSW扫描晶片时,可以将下一个扫描通道数据重新排列并加载到存储器缓冲器中。 因此,一旦一个扫描通道完成,读取存储器缓冲器中的下一个扫描通道数据进行扫描。

    HIGH-VOLUME MANUFACTURING MASSIVE E-BEAM MASKLESS LITHOGRAPHY SYSTEM
    29.
    发明申请
    HIGH-VOLUME MANUFACTURING MASSIVE E-BEAM MASKLESS LITHOGRAPHY SYSTEM 有权
    高容量制造大质量电子束MASTRESS LITHOGRAPHY系统

    公开(公告)号:US20100248158A1

    公开(公告)日:2010-09-30

    申请号:US12411229

    申请日:2009-03-25

    IPC分类号: G03F7/20 G21K5/04

    摘要: The present disclosure provides a maskless lithography apparatus. The apparatus includes a plurality of writing chambers, each including: a wafer stage operable to secure a wafer to be written and a multi-beam module operable to provide multiple radiation beams for writing the wafer; an interface operable to transfer wafers between each of the writing chambers and a track unit for processing an imaging layer to the wafers; and a data path operable to provide a set of circuit pattern data to each of the multiple radiation beams in each of the writing chambers.

    摘要翻译: 本公开提供一种无掩模光刻设备。 该装置包括多个写入室,每个写入室包括:可操作以固定要写入的晶片的晶片台和可操作以提供用于写入晶片的多个辐射束的多光束模块; 可操作以在每个写入室之间传送晶片的接口和用于将成像层处理到晶片的轨道单元; 以及数据路径,其可操作以向每个写入室中的每个多个辐射束提供一组电路图案数据。

    Multiple tools using a single data processing unit
    30.
    发明授权
    Multiple tools using a single data processing unit 有权
    使用单个数据处理单元的多种工具

    公开(公告)号:US08688254B2

    公开(公告)日:2014-04-01

    申请号:US11871360

    申请日:2007-10-12

    申请人: Burn Jeng Lin

    发明人: Burn Jeng Lin

    摘要: A method and system for simultaneously processing multiple substrates through an imaging beam process is provided. The system includes a plurality of direct write substrate exposure modules configured to receive a writing instruction from a data processing unit. The system and method of the invention utilizes multiple exposure modules receiving writing instructions from a single common data processing unit.

    摘要翻译: 提供了一种通过成像束过程同时处理多个基板的方法和系统。 该系统包括被配置为从数据处理单元接收写入指令的多个直接写入基板曝光模块。 本发明的系统和方法利用从单个公共数据处理单元接收写入指令的多个曝光模块。