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21.发明授权Method for fabricating wafer level semiconductor package with build-up layer 有权用于制造具有堆积层的晶片级半导体封装的方法公开(公告)号：US07445957B2
公开(公告)日：2008-11-04
申请号：US11580560
申请日：2006-10-12
CPC分类号： H01L21/6835 , H01L21/568 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/97 , H01L2924/01029 , H01L2924/01033 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/351 , H01L2924/3511 , H01L2224/82 , H01L2924/00
摘要： A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.
摘要翻译： 提供具有积层的晶片级半导体封装，其包括具有用于接收其中的半导体芯片的通孔的玻璃框架，填充在形成在半导体芯片和玻璃框架之间的空间内的低模量缓冲材料， 形成在所述玻璃框架和所述半导体芯片上的堆积层，使得所述积层层电连接到所述半导体芯片，以及安装在所述积层层上的多个导电元件，使得所述半导体芯片电连接 到外部设备。 通过使用玻璃框架和低模量缓冲材料，由此获得的晶片级半导体封装没有翘曲，芯片裂纹和分层问题，并且其可靠性得到提高。 还提供了一种用于制造晶片级半导体封装的方法。
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22.发明申请Heat dissipation unit and a semiconductor package that has the heat dissipation unit 审中-公开散热单元和具有散热单元的半导体封装公开(公告)号：US20080246142A1
公开(公告)日：2008-10-09
申请号：US12080798
申请日：2008-04-04
IPC分类号： H01L23/367
CPC分类号： H01L23/4334 , H01L24/48 , H01L24/49 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49175 , H01L2224/73265 , H01L2924/00014 , H01L2924/181 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A heat dissipation unit and a semiconductor package having the same are disclosed. The semiconductor package includes a carrier; an electronic component mounted on and electrically connected to the carrier; a heat dissipation unit, which includes a flat section attached to the electronic component, extension sections connected to the flat section, and a heat dissipation section connected to the extension sections; and an encapsulant encapsulating the electronic component and the heat dissipation unit, wherein stress releasing sections are at least disposed at intersectional corners between the extension sections and the flat section so as to prevent projections from being formed by concentrated stresses in a punching process of the heat dissipation unit, thereby maintaining flatness of the flat section and further preventing circuits of the electronic component from being damaged due to a contact point produced between the electronic component and the flat section in a molding process.
摘要翻译： 公开了一种散热单元和具有该散热单元的半导体封装。 半导体封装包括载体; 电子部件，其安装在所述载体上并与其电连接; 散热单元，其包括附接到所述电子部件的平坦部分，连接到所述平坦部分的延伸部分和连接到所述延伸部分的散热部分; 以及封装电子部件和散热部的密封剂，其中应力释放部至少设置在延伸部和平坦部之间的交叉角处，以防止在热冲压加工中由于集中应力而形成突起 从而保持平坦部分的平坦度，并且进一步防止电子部件的电路在模制过程中由于在电子部件和平坦部分之间产生的接触点而损坏。
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公开(公告)号：USD529031S1
公开(公告)日：2006-09-26
申请号：US29210201
申请日：2004-07-27
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24.发明申请Photosensitive semiconductor package with support member and method for fabricating the same 审中-公开具有支撑构件的感光半导体封装及其制造方法公开(公告)号：US20050184404A1
公开(公告)日：2005-08-25
申请号：US10835343
申请日：2004-04-28
IPC分类号： H01L21/48 , H01L23/04 , H01L23/28 , H01L31/0203
CPC分类号： H01L27/14683 , H01L23/04 , H01L24/97 , H01L27/14618 , H01L31/0203 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2924/15311 , H01L2924/181 , H01L2924/00014 , H01L2924/00
摘要： A photosensitive semiconductor package with a support member and its fabrication method are provided. The support member having a receiving space is placed on an upper surface of a substrate. An encapsulation body is formed on the substrate and bonded with an outer wall of the support member. At least one chip is mounted on a predetermined area of the substrate exposed via the receiving space, and is electrically connected to the substrate. A light-permeable lid is attached to the support member and the encapsulation body to seal the receiving space. A plurality of solder balls or contact lands are formed on a lower surface of the substrate. By provision of the support member, there is no need to use an insert mold, such that the substrate would not be damaged by the insert mold, and bond fingers on the substrate would not be contaminated by the insert mold.
摘要翻译： 提供具有支撑构件的光敏半导体封装及其制造方法。 具有接收空间的支撑构件被放置在基板的上表面上。 封装体形成在基板上并与支撑构件的外壁结合。 至少一个芯片安装在经由接收空间暴露的衬底的预定区域上，并且电连接到衬底。 透光盖附接到支撑构件和封装体以密封接收空间。 在基板的下表面上形成多个焊球或接触焊盘。 通过设置支撑构件，不需要使用插入模具，使得基板不会被插入模具损坏，并且基板上的键合指不会被插入模具污染。
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公开(公告)号：US20050170561A1
公开(公告)日：2005-08-04
申请号：US10844877
申请日：2004-05-12
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50 , H01L23/055 , H01L23/10 , H01L31/0203
CPC分类号： H01L23/055 , H01L21/50 , H01L23/10 , H01L24/45 , H01L24/48 , H01L24/97 , H01L27/14618 , H01L27/14683 , H01L2224/16 , H01L2224/45144 , H01L2224/48091 , H01L2224/73265 , H01L2224/92247 , H01L2224/97 , H01L2924/00014 , H01L2924/01005 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/15173 , H01L2924/15311 , H01L2924/16152 , H01L2924/16195 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2224/05599 , H01L2924/00
摘要： A fabrication method of a semiconductor package with a photosensitive chip is provided. A substrate having a core is prepared. An interposer is mounted on the substrate, with a peripheral portion of the substrate exposed from the interposer. A molding process is performed and the substrate is clamped between an upper mold and a lower mold, with the interposer received in an upwardly-recessed cavity of the upper mold. A molding compound is injected into the upwardly-recessed cavity to form a dam on the peripheral portion of the substrate. Then the upper and lower molds and the interposer are removed from the substrate to expose area covered by the interposer on the substrate. At least one photosensitive chip is mounted on the exposed area of the substrate. A lid seals the dam such that the chip is received in a space defined by the substrate, the dam and the lid.
摘要翻译： 提供了具有感光芯片的半导体封装的制造方法。 制备具有芯的衬底。 插入器安装在衬底上，衬底的周边部分从插入件露出。 进行成型工艺，并且将基板夹在上模具和下模具之间，其中插入件容纳在上模具的向上凹入的空腔中。 将模塑料注入到上凹腔中以在基材的周边部分上形成坝。 然后将上模和下模和插入件从基板上移除以露出基板上由插入件覆盖的区域。 至少一个感光芯片安装在基板的暴露区域上。 盖子密封大坝，使得芯片被容纳在由基板，坝和盖子限定的空间中。
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公开(公告)号：US20080303111A1
公开(公告)日：2008-12-11
申请号：US12156901
申请日：2008-06-05
IPC分类号： H01L31/0203 , H01L31/18
CPC分类号： H01L31/0203 , H01L23/24 , H01L31/18 , H01L2224/32225 , H01L2224/48227 , H01L2224/73265 , H01L2224/48091 , H01L2924/00014 , H01L2924/00
摘要： The invention discloses a sensor package and a method for fabricating the same. The sensor package includes: a substrate with an opening; a sensor chip disposed in the opening and electrically connected to the substrate; an encapsulant filling spacing between the sensor chip and the opening so as to secure the sensor chip to the substrate; and a transparent cover attached to the substrate via an adhesive layer, wherein the adhesive layer covers the sensor chip and bonding wires and is formed with an opening for exposing sensor region of the sensor chip. Securing the sensor chip in the opening of the substrate reduces the height of the sensor package, and meanwhile the process cost is reduced by eliminating the need of formation of conductive bumps on the sensor chip or the transparent cover and eliminating the need of specially designed substrate.
摘要翻译： 本发明公开了一种传感器封装及其制造方法。 传感器封装包括：具有开口的基板; 传感器芯片，其布置在所述开口中并电连接到所述基板; 传感器芯片和开口之间的密封剂填充间隔，以将传感器芯片固定到基板上; 以及通过粘合剂层附着到基板的透明盖，其中粘合剂层覆盖传感器芯片和接合线，并且形成有用于暴露传感器芯片的传感器区域的开口。 将传感器芯片固定在基板的开口中，降低传感器封装的高度，同时通过消除在传感器芯片或透明盖上形成导电凸块的需要降低工艺成本，并且不需要特别设计的基板 。
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公开(公告)号：US20080197438A1
公开(公告)日：2008-08-21
申请号：US12070003
申请日：2008-02-14
IPC分类号： H01L31/0203 , H01L31/18
CPC分类号： H01L31/0203 , H01L21/78 , H01L27/14618 , H01L27/14687 , H01L2224/94
摘要： This invention discloses a sensor semiconductor device and a manufacturing method thereof, including: providing a wafer having a plurality of sensor chips, forming a plurality of grooves between bond pads on active surfaces of the adjacent sensor chips; forming conductive traces in the grooves for electrically connecting the bond pads; mounting a transparent medium on the wafer for covering sensing areas of the sensor chips; thinning the sensor chips from the non-active surfaces down to the grooves, thereby exposing the conductive traces; cutting the wafer to separate the sensor chips; mounting the sensor chips on a substrate module having a plurality of substrates, electrically connecting the conductive traces to the substrates; providing an insulation material on the substrate module and between the sensor chips so as to encapsulate the sensor chips but expose the transparent medium; and cutting the substrate module to separate a plurality of resultant sensor semiconductor devices.
摘要翻译： 本发明公开了一种传感器半导体器件及其制造方法，包括：提供具有多个传感器芯片的晶片，在相邻传感器芯片的有源表面上的接合焊盘之间形成多个沟槽; 在沟槽中形成导电迹线以电连接接合焊盘; 在所述晶片上安装透明介质以覆盖所述传感器芯片的感测区域; 将传感器芯片从非活性表面减薄到凹槽，从而暴露导电迹线; 切割晶片以分离传感器芯片; 将传感器芯片安装在具有多个基板的基板模块上，将导电迹线电连接到基板; 在衬底模块上和传感器芯片之间提供绝缘材料，以封装传感器芯片，但暴露透明介质; 以及切割所述基板模块以分离多个所得传感器半导体器件。
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公开(公告)号：US20080079105A1
公开(公告)日：2008-04-03
申请号：US11904648
申请日：2007-09-27
IPC分类号： H01L31/0203 , H01L21/02
CPC分类号： H01L27/14618 , H01L24/97 , H01L27/14683 , H01L2224/48091 , H01L2224/48227 , H01L2224/97 , H01L2924/01005 , H01L2924/01033 , H01L2924/01082 , H01L2924/15311 , H01L2924/16195 , H01L2224/85 , H01L2924/00014
摘要： A sensor-type package and a fabrication method thereof are provided. A sensor-type chip is mounted on a substrate and is electrically connected to the substrate via bonding wires. A light-pervious body is attached to the sensor-type chip, and has one surface covered with a covering layer and another surface formed with an adhesive layer. An encapsulant encapsulates the light-pervious body. As an adhesive force between the covering layer and the encapsulant is greater than that between the covering layer and the light-pervious body, the covering layer and a portion of the encapsulant located on the covering layer can be concurrently removed, such that the light-pervious body is exposed and light can pass through the light-pervious body to be captured by the sensor-type chip. The above arrangement eliminates the need of using a dam structure as in the prior art and provides a compact sensor-type package with improved fabrication reliability.
摘要翻译： 提供了传感器型封装及其制造方法。 传感器型芯片安装在基板上，并通过接合线与基板电连接。 透光体附着在传感器型芯片上，其一个表面被覆盖层和形成有粘合剂层的另一表面覆盖。 密封剂封装透光体。 由于覆盖层和密封剂之间的粘合力大于覆盖层和透光体之间的粘合力，所以可以同时去除位于覆盖层上的覆盖层和密封剂的一部分， 透光体被曝光，光可以通过透光体，由传感器型芯片捕获。 上述布置消除了如现有技术中使用坝结构的需要，并且提供了具有改进的制造可靠性的紧凑型传感器型封装。
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29.发明申请Method for fabricating wafer level semiconductor package with build-up layer 有权用于制造具有堆积层的晶片级半导体封装的方法公开(公告)号：US20070034998A1
公开(公告)日：2007-02-15
申请号：US11580560
申请日：2006-10-12
IPC分类号： H01L23/02
CPC分类号： H01L21/6835 , H01L21/568 , H01L24/19 , H01L24/96 , H01L24/97 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/19 , H01L2224/20 , H01L2224/32225 , H01L2224/32245 , H01L2224/73267 , H01L2224/97 , H01L2924/01029 , H01L2924/01033 , H01L2924/12042 , H01L2924/15311 , H01L2924/181 , H01L2924/18162 , H01L2924/351 , H01L2924/3511 , H01L2224/82 , H01L2924/00
摘要： A wafer level semiconductor package with a build-up layer is provided, which includes a glass frame having a through hole for receiving a semiconductor chip therein, a low-modulus buffer material filled within the space formed between the semiconductor chip and the glass frame, a build-up layer formed on the glass frame and the semiconductor chip such that the build-up layer is electrically connected to the semiconductor chip, and a plurality of conductive elements mounted on the build-up layer so that the semiconductor chip is electrically connected to external devices. With the use of the glass frame and low-modulus buffer material, the wafer level semiconductor package thus-obtained is free from warpage, chip-crack, and delamination problems and the reliability thereof is enhanced. A method for fabricating the wafer level semiconductor package is also provided.
摘要翻译： 提供具有积层的晶片级半导体封装，其包括具有用于接收其中的半导体芯片的通孔的玻璃框架，填充在形成在半导体芯片和玻璃框架之间的空间内的低模量缓冲材料， 形成在所述玻璃框架和所述半导体芯片上的堆积层，使得所述积层层电连接到所述半导体芯片，以及安装在所述积层层上的多个导电元件，使得所述半导体芯片电连接 到外部设备。 通过使用玻璃框架和低模量缓冲材料，由此获得的晶片级半导体封装没有翘曲，芯片裂纹和分层问题，并且其可靠性得到提高。 还提供了一种用于制造晶片级半导体封装的方法。
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公开(公告)号：US20060292741A1
公开(公告)日：2006-12-28
申请号：US11471516
申请日：2006-06-21
IPC分类号： H01L21/00
CPC分类号： H01L23/3128 , H01L21/561 , H01L23/4334 , H01L24/48 , H01L24/97 , H01L2224/16 , H01L2224/48227 , H01L2224/97 , H01L2924/00011 , H01L2924/00014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/351 , H01L2224/81 , H01L2924/00 , H01L2924/00012 , H01L2224/0401 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A heat-dissipating semiconductor package and a fabrication method thereof are provided. A semiconductor chip is mounted and electrically connected to a substrate. A heat-dissipating structure includes a heat sink and at least one supporting portion, wherein the supporting portion is attached to the substrate at a position outside a predetermined package area for the semiconductor package, and the semiconductor chip is disposed under the heat sink. An encapsulant is formed on the substrate to encapsulate the semiconductor chip and the heat-dissipating structure, wherein a projection area of the encapsulant on the substrate is larger in size than the predetermined package area. A cutting process is performed along edges of the predetermined package area to remove parts of the encapsulant, the supporting portion and the substrate, which are located outside the predetermined package area, so as to form the semiconductor package integrated with the heat-dissipating structure.
摘要翻译： 提供散热半导体封装及其制造方法。 半导体芯片安装并电连接到基板。 散热结构包括散热器和至少一个支撑部分，其中支撑部分在用于半导体封装的预定封装区域外的位置处附接到基板，并且半导体芯片设置在散热器下方。 在基板上形成密封剂以封装半导体芯片和散热结构，其中密封剂在基板上的投影面积大于预定封装面积。 沿着预定包装区域的边缘进行切割处理以去除位于预定包装区域外部的密封剂，支撑部分和基底的部分，以形成与散热结构集成的半导体封装。
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