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    ANTI-BACTERIAL ORAL CARE COMPOSITION AND METHOD FOR PRODUCING THE SAME
    3.
    发明申请
    ANTI-BACTERIAL ORAL CARE COMPOSITION AND METHOD FOR PRODUCING THE SAME 审中-公开
    抗细菌口腔护理组合物及其生产方法

    公开(公告)号：US20120237457A1

    公开(公告)日：2012-09-20

    申请号：US13052077

    申请日：2011-03-20

    申请人： Shu-Cheng CHEN ,  Ho-Yi Tsai

    发明人： Shu-Cheng CHEN ,  Ho-Yi Tsai

    IPC分类号： A61K8/73 ,  A61K8/21 ,  A61P31/04 ,  A61K31/722 ,  A61Q11/00

    CPC分类号： A61K31/722 ,  A61K8/345 ,  A61K8/36 ,  A61K8/365 ,  A61K8/67 ,  A61K8/736 ,  A61Q11/00 ,  A61Q17/005

    摘要： An anti-bacterial oral care composition and method for producing the same are disclosed. The composition comprises chitosan, organic acid, bioflavonoids and xylitol that are mixed together and can effectively inhibit the growth of bacteria in oral cavity, such as 99.9% of staphylococcus aureus, 99.9% of streptococcus mutans, 99.9% of candida albicans, thus reducing the occurrence of decayed tooth. Furthermore, no chemical preservative and anti-bacterial agent are added in the composition, reducing the damage to the oral mucosa and the health of the user.

    摘要翻译： 公开了一种抗菌口腔护理组合物及其制备方法。 组合物包含混合在一起的壳聚糖，有机酸，生物类黄酮和木糖醇，可有效抑制口腔中细菌的生长，如99.9％的金黄色葡萄球菌，99.9％的变异链球菌，99.9％的白色念珠菌，从而减少 蛀牙的发生。 此外，在组合物中不添加化学防腐剂和抗菌剂，减少对口腔粘膜的损害和使用者的健康。

    Electronic carrier board and package structure thereof
    4.
    发明授权
    Electronic carrier board and package structure thereof 有权
    电子载板及其封装结构

    公开(公告)号：US08013443B2

    公开(公告)日：2011-09-06

    申请号：US12727307

    申请日：2010-03-19

    申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

    发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Chih-Ming Huang ,  Chien-Ping Huang

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L23/3121 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/3025 ,  H05K3/284 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/10636 ,  Y02P70/611 ,  H01L2924/00

    摘要： An electronic carrier board and a package structure thereof are provided. The electronic carrier board includes a carrier, at least one pair of bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings for exposing the bond pads. A groove is formed between the paired bond pads and has a length larger than a width of an electronic component mounted on the paired bond pads. The groove is adjacent to one of the paired bond pads and communicates with a corresponding one of the openings where this bond pad is exposed. Accordingly, a clearance between the electronic component and the electronic carrier board can be effectively filled with an insulating resin for encapsulating the electronic component, thereby preventing voids and undesirable electrical bridging between the paired bond pads from occurrence.

    摘要翻译： 提供电子载体板及其封装结构。 电子载板包括载体，形成在载体上的至少一对接合焊盘和覆盖载体的保护层。 保护层形成有用于暴露接合焊盘的开口。 在成对的接合焊盘之间形成有一个沟槽，其长度大于安装在成对接合焊盘上的电子部件的宽度。 该沟槽与一对接合焊盘相邻，并与该接合焊盘露出的相应的一个开口连通。 因此，电子部件和电子载体板之间的间隙可以有效地填充用于封装电子部件的绝缘树脂，从而防止成对焊盘之间的空隙和不期望的电桥发生。

    Stack structure of semiconductor packages and method for fabricating the stack structure
    5.
    发明授权
    Stack structure of semiconductor packages and method for fabricating the stack structure 有权
    半导体封装的堆叠结构和制造堆叠结构的方法

    公开(公告)号：US07855443B2

    公开(公告)日：2010-12-21

    申请号：US11732853

    申请日：2007-04-04

    申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

    发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Han-Ping Pu ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/02

    CPC分类号： H01L25/105 ,  H01L23/49811 ,  H01L23/49838 ,  H01L24/73 ,  H01L25/50 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/01077 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

    摘要： A stack structure of semiconductor packages and a method for fabricating the stack structure are provided. A plurality of electrical connection pads and dummy pads are formed on a surface of a substrate of an upper semiconductor package and at positions corresponding to those around an encapsulant of a lower semiconductor package. Solder balls are implanted to the electrical connection pads and the dummy pads. The upper semiconductor package is mounted on the lower semiconductor package. The upper semiconductor package is electrically connected to the lower semiconductor package by the solder balls implanted to the electrical connection pads, and the encapsulant of the lower semiconductor package is surrounded and confined by the solder balls implanted to the dummy pads. Thereby, the upper semiconductor package is properly and securely positioned on the lower semiconductor package, without the occurrence of misalignment between the upper and lower semiconductor packages.

    摘要翻译： 提供半导体封装的堆叠结构以及制造叠层结构的方法。 在上半导体封装的衬底的表面上和与下半导体封装的密封剂周围的位置对应的位置处形成多个电连接焊盘和虚拟焊盘。 将焊球植入电连接焊盘和虚拟焊盘。 上半导体封装安装在下半导体封装上。 上半导体封装通过注入电连接焊盘的焊球电连接到下半导体封装，并且下半导体封装的密封剂被植入到虚拟焊盘中的焊球围绕并限制。 因此，上半导体封装被适当且牢固地定位在下半导体封装上，而不会发生上下半导体封装之间的未对准。

    ELECTRONIC CARRIER BOARD
    6.
    发明申请
    ELECTRONIC CARRIER BOARD 有权
    电子载体板

    公开(公告)号：US20090288866A1

    公开(公告)日：2009-11-26

    申请号：US12535397

    申请日：2009-08-04

    申请人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Wen-Tsung Tseng ,  Chih-Ming Huang

    发明人： Fang-Lin Tsai ,  Ho-Yi Tsai ,  Wen-Tsung Tseng ,  Chih-Ming Huang

    IPC分类号： H05K1/16 ,  H05K1/02

    CPC分类号： H01R43/0256 ,  H01R43/0228 ,  H05K3/3442 ,  H05K3/3452 ,  H05K2201/0989 ,  H05K2201/099 ,  H05K2201/10636 ,  Y02P70/611 ,  Y02P70/613

    摘要： An electronic carrier board is provided, including a carrier, at least two paired bond pads formed on the carrier, and a protective layer covering the carrier. The protective layer is formed with openings corresponding in position to the two bond pads. The openings are aligned in the same direction and expose at least a first sidewall and a second sidewall of each of the two bond pads. The first sidewall is perpendicular to an alignment direction of the bond pads and the second sidewall is parallel to the alignment direction of the bond pads. A distance between the first sidewall of at least one of the bond pads and a corresponding side of a corresponding one of the openings is at least about 50 μm greater than a distance between the second sidewall of the at least one bond pad and a corresponding side of the corresponding opening.

    摘要翻译： 提供一种电子载体板，包括载体，形成在载体上的至少两个成对的接合焊盘和覆盖载体的保护层。 保护层形成有与两个接合焊盘相对应的开口。 开口沿相同方向排列，并暴露两个接合焊盘中的每一个的至少第一侧壁和第二侧壁。 第一侧壁垂直于接合焊盘的对准方向，第二侧壁平行于接合焊盘的对准方向。 至少一个接合焊盘的第一侧壁与对应的一个开口的对应侧之间的距离比至少一个接合焊盘的第二侧壁和相应侧面之间的距离大至少约50μm 的相应开口。

    Heat dissipation semiconductor package
    7.
    发明授权
    Heat dissipation semiconductor package 有权
    散热半导体封装

    公开(公告)号：US07608915B2

    公开(公告)日：2009-10-27

    申请号：US12151902

    申请日：2008-05-08

    申请人： Chun-Ming Liao ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    发明人： Chun-Ming Liao ,  Chien-Ping Huang ,  Ho-Yi Tsai ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/495 ,  H01J23/10

    CPC分类号： H01L23/4334 ,  H01L24/73 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401

    摘要： A heat dissipation semiconductor package includes a chip carrier, a semiconductor chip, a heat conductive adhesive, a heat dissipation member, and an encapsulant. The semiconductor chip is flip-chip mounted on the chip carrier and defined with a heat conductive adhesive mounting area. Periphery of the heat adhesive mounting area is spaced apart from edge of the semiconductor chip. The heat dissipation member is mounted on the heat conductive adhesive formed in the heat conductive adhesive mounting area. The encapsulant formed between the chip carrier and the heat dissipation member encapsulates the semiconductor chip and the heat conductive adhesive, and embeds edges of the active surface and non-active surface and side edge of the semiconductor chip, thereby increasing bonding area between the encapsulant and the semiconductor chip. The side edges of the heat conductive adhesive and the semiconductor chip are not flush with each other, thereby preventing propagation of delamination.

    摘要翻译： 散热半导体封装包括芯片载体，半导体芯片，导热粘合剂，散热构件和密封剂。 半导体芯片倒装芯片安装在芯片载体上，并用导热粘合剂安装区域限定。 热粘合剂安装区域的周边与半导体芯片的边缘间隔开。 散热构件安装在形成在导热粘合剂安装区域中的导热粘合剂上。 形成在芯片载体和散热构件之间的密封剂封装半导体芯片和导热粘合剂，并且嵌入半导体芯片的有源表面和非有源表面和侧边缘的边缘，从而增加密封剂和 半导体芯片。 导热粘合剂和半导体芯片的侧边缘彼此不齐平，从而防止分层的蔓延。

    Heat dissipating semiconductor package and fabrication method therefor
    8.
    发明申请
    Heat dissipating semiconductor package and fabrication method therefor 审中-公开
    散热半导体封装及其制造方法

    公开(公告)号：US20080122071A1

    公开(公告)日：2008-05-29

    申请号：US11986362

    申请日：2007-11-21

    申请人： Wen-Tsung Tseng ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Chih-Wei Chang ,  Cheng-Hsu Hsiao

    发明人： Wen-Tsung Tseng ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Chih-Wei Chang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L23/373

    CPC分类号： H01L23/3128 ,  H01L21/568 ,  H01L23/4334 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32245 ,  H01L2224/73253 ,  H01L2924/15311

    摘要： A heat dissipating semiconductor package and the fabrication method therefor are provided. The fabrication method for the heat dissipating semiconductor package mainly includes steps of: containing a substrate having a chip mounted thereon in an aperture of a carrier, wherein the carrier has an electroconductive layer; allowing a heat dissipating structure having supporting portions to be mounted on and electrically connected to the electroconductive layer of the carrier via the supporting portions thereof while heat dissipating structure being mounted on the chip; after an encapsulation process and removing a part of the encapsulant above the heat dissipating sheet by lapping to expose a surface of the heat dissipating structure from the encapsulant, depositing and forming a metal passivation layer on the surface of the heat dissipating structure by electroplating for preventing the heat dissipating structure from oxidizing.

    摘要翻译： 提供一种散热半导体封装及其制造方法。 用于散热半导体封装的制造方法主要包括以下步骤：在载体的孔中容纳其上安装有芯片的基板，其中载体具有导电层; 允许散热结构，其具有支撑部分，其安装在载体的导电层上并通过其支撑部分电连接，同时散热结构安装在芯片上; 在封装工艺之后并且通过研磨去除散热片上方的一部分密封剂，以从密封剂暴露出散热结构的表面，在散热结构的表面上沉积和形成金属钝化层，通过电镀防止 散热结构从氧化。

    Method for fabricating semiconductor packages
    9.
    发明授权
    Method for fabricating semiconductor packages 有权
    半导体封装的制造方法

    公开(公告)号：US07348211B2

    公开(公告)日：2008-03-25

    申请号：US11117158

    申请日：2005-04-27

    申请人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    发明人： Ying-Ren Lin ,  Ho-Yi Tsai ,  Chien-Ping Huang ,  Cheng-Hsu Hsiao

    IPC分类号： H01L21/50 ,  H01L21/48 ,  H01L21/44

    CPC分类号： H01L21/565 ,  H01L21/568 ,  H01L23/3128 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

    摘要： A method for fabricating semiconductor packages is proposed. A plurality of substrates each having a chip thereon are prepared. Each substrate has similar length and width to the predetermined length and width of the semiconductor package. A carrier having a plurality of openings is prepared. Each opening is larger in length and width than the substrate. The substrates are positioned in the corresponding openings, and gaps between the substrates and the carrier are sealed. A molding process is performed to form an encapsulant over each opening to encapsulate the chip. An area on the carrier covered by the encapsulant is larger in length and width than the opening. After performing a mold-releasing process, a plurality of the semiconductor packages are formed by a singulation process to cut along substantially edges of each substrate according to the predetermined size of the semiconductor package. A waste of substrate material is avoided.

    摘要翻译： 提出了制造半导体封装的方法。 制备各自具有芯片的多个基板。 每个衬底具有与半导体封装的预定长度和宽度相似的长度和宽度。 制备具有多个开口的载体。 每个开口的长度和宽度大于衬底。 基板定位在相应的开口中，基板和载体之间的间隙被密封。 执行成型工艺以在每个开口上形成密封剂以封装芯片。 由密封剂覆盖的载体上的区域的长度和宽度大于开口的宽度。 在执行脱模工艺之后，通过单片化工艺形成多个半导体封装，以根据半导体封装的预定尺寸沿着每个衬底的大致边缘切割。 避免了衬底材料的浪费。