公开(公告)号：US07220647B2

公开(公告)日：2007-05-22

申请号：US11050261

申请日：2005-02-02

申请人： Chih-Ning Wu ,  Charlie C J Lee ,  Kuan-Yang Liao

发明人： Chih-Ning Wu ,  Charlie C J Lee ,  Kuan-Yang Liao

IPC分类号： H01L21/336 ,  H01L21/302 ,  H01L21/461

CPC分类号： H01L21/02071 ,  H01L21/0206 ,  H01L21/28088 ,  H01L21/28194 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/518

摘要： A method of cleaning a wafer, adapted for a patterned gate structure. The gate structures comprise a gate dielectric layer, a nitrogen-containing barrier layer and a silicon-containing gate layer sequentially stacked over the substrate. The method includes cleaning the substrate with phosphoric acid solution and hydrofluoric acid solution so that silicon nitride residues formed in a reaction between the nitrogen-containing barrier layer and the silicon-containing gate layer can be removed and the amount of pollutants and particles can be reduced. Ultimately, the yield of the process as well as the quality and reliability of the device are improved.

摘要翻译： 一种适用于图案化栅极结构的清洁晶片的方法。 栅极结构包括依次层叠在衬底上的栅极介电层，含氮势垒层和含硅栅极层。 该方法包括用磷酸溶液和氢氟酸溶液清洗基板，使得可以除去在含氮阻挡层和含硅栅层之间的反应中形成的氮化硅残留物，并且可以减少污染物和颗粒的量 。 最终，改善了工艺的产量以及设备的质量和可靠性。

公开(公告)号：US20070099423A1

公开(公告)日：2007-05-03

申请号：US11163849

申请日：2005-11-01

申请人： Cheng-Kuen Chen ,  Chih-Ning Wu ,  Wei-Tsun Shiau ,  Wen-Fu Yu

发明人： Cheng-Kuen Chen ,  Chih-Ning Wu ,  Wei-Tsun Shiau ,  Wen-Fu Yu

IPC分类号： H01L21/302 ,  C03C25/68 ,  B44C1/22 ,  C03C15/00

CPC分类号： H01L29/66507 ,  H01L21/28079 ,  H01L21/28088 ,  H01L21/28097 ,  H01L21/32134 ,  H01L21/32137 ,  H01L29/66545

摘要： A method of removing a metal silicide layer on a gate electrode in a semiconductor manufacturing process is disclosed, in which the gate electrode, a metal silicide layer, a spacer, a silicon nitride cap layer, and a dielectric layer have been formed. The method includes performing a chemical mechanical polishing process to polish the dielectric layer using the silicon nitride cap layer as a polishing stop layer to expose the silicon nitride cap layer over the gate electrode; removing the exposed silicon nitride cap layer to expose the metal silicide layer; and performing a first etching process to remove the metal silicide layer on the gate electrode.

摘要翻译： 公开了一种在半导体制造工艺中去除栅电极上的金属硅化物层的方法，其中已经形成了栅极，金属硅化物层，间隔物，氮化硅覆盖层和电介质层。 该方法包括使用氮化硅盖层作为抛光停止层进行化学机械抛光工艺以抛光电介质层，以在栅电极上露出氮化硅覆盖层; 去除暴露的氮化硅覆盖层以暴露金属硅化物层; 并执行第一蚀刻工艺以去除栅电极上的金属硅化物层。

公开(公告)号：US20070063290A1

公开(公告)日：2007-03-22

申请号：US11162693

申请日：2005-09-20

申请人： Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen ,  Yi-Yiing Chiang ,  Yu-Lan Chang ,  Chung-Ju Lee ,  Chih-Ning Wu ,  Kuan-Yang Liao

发明人： Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen ,  Yi-Yiing Chiang ,  Yu-Lan Chang ,  Chung-Ju Lee ,  Chih-Ning Wu ,  Kuan-Yang Liao

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/6653 ,  H01L21/28518 ,  H01L21/31111 ,  H01L29/6659

摘要： A method for forming a metal oxide semiconductor (MOS) transistor is provided. First, a gate structure is formed over a substrate. Then, offset spacers are formed on respective sidewalls of the gate structure. A first ion implantation process is performed to form a lightly doped drain (LDD) in the substrate beside the gate structure. Other spacers are formed on respective sidewalls of the offset spacers. Thereafter, a second ion implantation process is performed to form source/drain region in the substrate beside the spacers. Then, a metal silicide layer is formed on the surface of the source and the drain. An oxide layer is formed on the surface of the metal silicide layer. The spacers are removed and an etching stop layer is formed on the substrate. With the oxide layer over the metal silicide layer, the solvent for removing the spacers is prevented from damaging the metal silicide layer.

摘要翻译： 提供一种用于形成金属氧化物半导体（MOS）晶体管的方法。 首先，在基板上形成栅极结构。 然后，在栅极结构的相应侧壁上形成偏移间隔物。 执行第一离子注入工艺以在栅极结构旁边的衬底中形成轻掺杂漏极（LDD）。 在偏置间隔物的相应侧壁上形成其它间隔物。 此后，进行第二离子注入工艺以在衬垫旁边的衬垫上形成源极/漏极区域。 然后，在源极和漏极的表面上形成金属硅化物层。 在金属硅化物层的表面上形成氧化物层。 去除间隔物，并在衬底上形成蚀刻停止层。 通过金属硅化物层上的氧化物层，可以防止用于除去间隔物的溶剂损坏金属硅化物层。

公开(公告)号：US07172976B2

公开(公告)日：2007-02-06

申请号：US10707986

申请日：2004-01-29

申请人： Chih-Ning Wu

发明人： Chih-Ning Wu

IPC分类号： H01I21/302 ,  C09K13/00

CPC分类号： H01L21/02063 ,  C23G1/00 ,  H01L21/32134 ,  H01L21/76807 ,  H01L21/76814 ,  H01L21/76838

摘要： An extrusion-free wet cleaning process for post-etch Cu-dual damascene structures is developed. The process includes the following steps: (1). providing a wafer having a silicon substrate and at least one post-etch Cu-dual damascene structure, the post-etch Cu-dual damascene structure having a via structure exposing a portion of a Cu wiring line electrically connected with an N+ diffusion region of the silicon substrate, and a trench structure formed on the via structure; (2). applying a diluted H2O2 solution on the wafer to slightly oxidize the surface of the exposed Cu wiring line; (3). washing away cupric oxide generated in the oxidation step by means of an acidic cupric oxide cleaning solution containing diluted HF, NH4F or NH2OH; and (4). providing means for preventing Cu reduction reactions on the Cu wiring line.

摘要翻译： 开发了一种用于后蚀刻铜双镶嵌结构的无挤出湿法清洗工艺。 该过程包括以下步骤：（1）。 提供具有硅衬底和至少一个后蚀刻Cu-双镶嵌结构的晶片，所述后蚀刻Cu-双镶嵌结构具有通孔结构，其暴露与N + 硅衬底的扩散区域和形成在通孔结构上的沟槽结构; （2）。 将稀释的H 2 O 2 O 2溶液施加到晶片上以稍微氧化暴露的Cu布线的表面; （3）。 通过含有稀释的HF，NH 4 F或NH 2 OH的酸性氧化铜清洗溶液洗涤在氧化步骤中产生的氧化铜; 和（4）。 提供了防止Cu布线上的Cu还原反应的手段。

公开(公告)号：US07135400B2

公开(公告)日：2006-11-14

申请号：US10709278

申请日：2004-04-26

申请人： Wen-Liang Lien ,  Charlie C J Lee ,  Chih-Ning Wu ,  Jain-Hon Chen

发明人： Wen-Liang Lien ,  Charlie C J Lee ,  Chih-Ning Wu ,  Jain-Hon Chen

IPC分类号： H01L21/4763

CPC分类号： H01L21/76811 ,  H01L21/76813

摘要： A method for avoiding resist poisoning during a damascene process is disclosed. A semiconductor substrate is provided with a low-k dielectric layer (k≦2.9) thereon, a SiC layer over the low-k dielectric layer, and a blocking layer over the SiC layer. The blocking layer is used to prevent unpolymerized precursors diffused out from the low-k dielectric layer from contacting an overlying resist. A bottom anti-reflection coating (BARC) layer is formed on the blocking layer. A resist layer is formed on the BARC layer, the resist layer having an opening to expose a portion of the BARC layer. A damascene structure is formed in the low-k dielectric layer by etching the BARC layer, the blocking layer, the SiC layer, and the low-k dielectric layer through the opening.

摘要翻译： 公开了一种在大马士革过程中避免抗蚀剂中毒的方法。 在半导体衬底上设置有低k电介质层（k <= 2.9），在低k电介质层上的SiC层和在SiC层上的阻挡层。 阻挡层用于防止从低k电介质层扩散的未聚合的前体与上覆抗蚀剂接触。 在阻挡层上形成底部防反射涂层（BARC）层。 在BARC层上形成抗蚀剂层，抗蚀剂层具有露出BARC层的一部分的开口。 通过开口蚀刻BARC层，阻挡层，SiC层和低k电介质层，在低k电介质层中形成镶嵌结构。

公开(公告)号：US20060134921A1

公开(公告)日：2006-06-22

申请号：US11295680

申请日：2005-12-05

申请人： Chih-Ning Wu ,  Wen-Sheng Chien

发明人： Chih-Ning Wu ,  Wen-Sheng Chien

IPC分类号： C23F1/00 ,  H01L21/461 ,  H01L21/302

CPC分类号： H01L21/31116 ,  H01L21/02131 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/31144 ,  H01L21/76811 ,  H01L21/76813

摘要： A plasma etching process is described. A substrate having a low-k material layer and a metal hard mask layer sequentially formed thereon is provided, wherein the metal hard mask layer exposes a portion of the low-k material layer. The low-k material layer is then etched with plasma of a gas mixture of helium (He) and at least one fluorinated hydrocarbon by using the metal hard mask layer as a mask.

摘要翻译： 描述等离子体蚀刻工艺。 提供了在其上顺序地形成有低k材料层和金属硬掩模层的基板，其中金属硬掩模层暴露低k材料层的一部分。 然后通过使用金属硬掩模层作为掩模，用等离子体氦（He）和至少一种氟化烃的气体混合物的等离子体蚀刻低k材料层。

公开(公告)号：US20060134899A1

公开(公告)日：2006-06-22

申请号：US10905185

申请日：2004-12-21

申请人： Chih-Ning Wu ,  Charlie CJ Lee ,  Kuan-Yang Liao

发明人： Chih-Ning Wu ,  Charlie CJ Lee ,  Kuan-Yang Liao

IPC分类号： H01L21/461

CPC分类号： H01L29/7843 ,  H01L21/31111 ,  H01L29/6653 ,  H01L29/6659 ,  H01L29/7833

摘要： A method of removing spacers after forming a MOS transistor on a wafer. The MOS transistor comprises a gate disposed on the substrate, spacers disposed on the sidewalls of the gate and a source and a drain region in the substrate beside the spacers. The spacers are removed by performing a wet etching process in the dark such that during the spacer removal process, the source and the drain region in a MOS transistor can be prevented from damages.

摘要翻译： 在晶片上形成MOS晶体管之后去除间隔物的方法。 MOS晶体管包括设置在衬底上的栅极，设置在栅极的侧壁上的间隔物以及衬垫旁边的源极和漏极区域。 通过在黑暗中执行湿式蚀刻工艺来去除间隔物，使得在间隔物去除工艺期间，可以防止MOS晶体管中的源极和漏极区域损坏。

公开(公告)号：US6060415A

公开(公告)日：2000-05-09

申请号：US796470

申请日：1997-02-10

申请人： Kuei-Jung Chao ,  Chih-Ning Wu ,  Han-Chang Shih ,  Tzeng-Guang Tsai

发明人： Kuei-Jung Chao ,  Chih-Ning Wu ,  Han-Chang Shih ,  Tzeng-Guang Tsai

IPC分类号： B01D67/00 ,  B01D71/02 ,  B01J20/02 ,  B01J20/28 ,  B01J29/84 ,  B01J35/06 ,  B01J27/182 ,  B01J29/04 ,  B01J29/06

CPC分类号： B01D71/025 ,  B01D67/0065 ,  B01D71/028 ,  B01J20/08 ,  B01J20/186 ,  B01J20/28033 ,  B01J20/28035 ,  B01J29/84 ,  B01J35/065 ,  B82Y30/00

摘要： The present invention provides a molecular sieve composite membrane, which includes an anodic alumina membrane as a support and the uni-directionally oriented molecular sieve membrane grown in situ on the anodic alumina membrane. The close packing transitional metal containing aluminophosphate AFI molecular sieve crystals have successfully been grown on the anodic alumina. The molecular sieve phase bounded strongly and anchored into the anodic alumina membrane. Besides, the specific cylindrical channels of the anodic alumina membrane provides the template function to orient the growth of molecular sieves.

摘要翻译： 本发明提供一种分子筛复合膜，其包括作为载体的阳极氧化铝膜和在阳极氧化铝膜上原位生长的单向取向分子筛膜。 含铝磷酸盐AFI分子筛晶体的紧密堆积过渡金属成功地在阳极氧化铝上生长。 分子筛相强烈地界定并固定在阳极氧化铝膜中。 此外，阳极氧化铝膜的特定圆柱形通道提供了模板功能以使分子筛的生长定向。

公开(公告)号：US07491615B2

公开(公告)日：2009-02-17

申请号：US11162798

申请日：2005-09-23

申请人： Chih-Ning Wu ,  Hsin Tai ,  Chung-Ju Lee ,  Wei-Tsun Shiau

发明人： Chih-Ning Wu ,  Hsin Tai ,  Chung-Ju Lee ,  Wei-Tsun Shiau

IPC分类号： H01L21/336

CPC分类号： H01L21/823807 ,  H01L21/823814 ,  H01L29/165 ,  H01L29/6653 ,  H01L29/6656 ,  H01L29/66636 ,  H01L29/7848

摘要： A method of fabricating strained-silicon transistors includes providing a semiconductor substrate, in which the semiconductor substrate contains a gate structure thereon; performing an etching process to form two recesses corresponding to the gate structure within the semiconductor substrate; performing an oxygen flush on the semiconductor substrate; performing a cleaning process on the semiconductor substrate; and performing a selective epitaxial growth (SEG) to form an epitaxial layer in each recess for forming a source/drain region.

摘要翻译： 制造应变硅晶体管的方法包括：提供半导体衬底，其中半导体衬底在其上包含栅极结构; 执行蚀刻工艺以形成对应于半导体衬底内的栅极结构的两个凹部; 在半导体衬底上进行氧冲洗; 对所述半导体衬底进行清洁处理; 并且在每个用于形成源/漏区的凹槽中执行选择性外延生长（SEG）以形成外延层。

公开(公告)号：US07214988B2

公开(公告)日：2007-05-08

申请号：US11162693

申请日：2005-09-20

申请人： Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen ,  Yi-Yiing Chiang ,  Yu-Lan Chang ,  Chung-Ju Lee ,  Chih-Ning Wu ,  Kuan-Yang Liao

发明人： Po-Chao Tsao ,  Chang-Chi Huang ,  Ming-Tsung Chen ,  Yi-Yiing Chiang ,  Yu-Lan Chang ,  Chung-Ju Lee ,  Chih-Ning Wu ,  Kuan-Yang Liao

IPC分类号： H01L29/76

CPC分类号： H01L29/6653 ,  H01L21/28518 ,  H01L21/31111 ,  H01L29/6659

摘要： A method for forming a metal oxide semiconductor (MOS) transistor is provided. First, a gate structure is formed over a substrate. Then, offset spacers are formed on respective sidewalls of the gate structure. A first ion implantation process is performed to form a lightly doped drain (LDD) in the substrate beside the gate structure. Other spacers are formed on respective sidewalls of the offset spacers. Thereafter, a second ion implantation process is performed to form source/drain region in the substrate beside the spacers. Then, a metal silicide layer is formed on the surface of the source and the drain. An oxide layer is formed on the surface of the metal silicide layer. The spacers are removed and an etching stop layer is formed on the substrate. With the oxide layer over the metal silicide layer, the solvent for removing the spacers is prevented from damaging the metal silicide layer.

摘要翻译： 提供一种用于形成金属氧化物半导体（MOS）晶体管的方法。 首先，在基板上形成栅极结构。 然后，在栅极结构的相应侧壁上形成偏移间隔物。 执行第一离子注入工艺以在栅极结构旁边的衬底中形成轻掺杂漏极（LDD）。 在偏置间隔物的相应侧壁上形成其它间隔物。 此后，进行第二离子注入工艺以在衬垫旁边的衬垫上形成源极/漏极区域。 然后，在源极和漏极的表面上形成金属硅化物层。 在金属硅化物层的表面上形成氧化物层。 去除间隔物，并在衬底上形成蚀刻停止层。 通过金属硅化物层上的氧化物层，可以防止用于除去间隔物的溶剂损坏金属硅化物层。