公开(公告)号：US11739422B2

公开(公告)日：2023-08-29

申请号：US17807920

申请日：2022-06-21

申请人： ASM IP HOLDING B.V.

发明人： Varun Sharma ,  Eva E. Tois

IPC分类号： C23C16/04 ,  C23C16/40 ,  C23C16/455 ,  C23C16/44 ,  C23C16/18 ,  H01L23/31 ,  H01L21/02 ,  C23C16/02 ,  H01L21/321 ,  H01L21/32

CPC分类号： C23C16/45525 ,  C23C16/0272 ,  C23C16/042 ,  C23C16/18 ,  C23C16/405 ,  C23C16/4404 ,  H01L21/0228 ,  H01L21/02137 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/321 ,  H01L23/3171 ,  H01L21/32

摘要： Passivation layers to inhibit vapor deposition can be used on reactor surfaces to minimize deposits while depositing on a substrate housed therein, or on particular substrate surfaces, such as metallic surfaces on semiconductor substrates to facilitate selective deposition on adjacent dielectric surfaces. Passivation agents that are smaller than typical self-assembled monolayer precursors can have hydrophobic or non-reactive ends and facilitate more dense passivation layers more quickly than self-assembled monolayers, particularly over complex three-dimensional structures.

公开(公告)号：US20160343608A1

公开(公告)日：2016-11-24

申请号：US14718769

申请日：2015-05-21

申请人： SANDISK TECHNOLOGIES INC.

发明人： Shinjiro Umehara ,  Daiki Teshima

IPC分类号： H01L21/762 ,  H01L29/06 ,  H01L21/311 ,  H01L27/115 ,  H01L21/02 ,  H01L21/306

CPC分类号： H01L21/76224 ,  H01L21/02126 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/02222 ,  H01L21/02304 ,  H01L21/02356 ,  H01L21/30604 ,  H01L21/3105 ,  H01L21/31111 ,  H01L21/31116 ,  H01L21/31133 ,  H01L21/31138 ,  H01L21/764 ,  H01L27/11517 ,  H01L27/11524 ,  H01L29/0649

摘要： A method of forming a shallow trench isolation trench in a semiconductor substrate is described. The method includes forming a trench in a region of the substrate, forming a liner in the trench, wherein the liner includes a first dielectric material, adhering a halogen element to the liner, forming a second dielectric material in the trench, annealing the first dielectric material and the second dielectric material, exposing a portion of a surface of the second dielectric material, and isotropically etching the exposed portion of the surface of the second dielectric material to form an air gap in the shallow trench isolation trench.

摘要翻译： 描述了在半导体衬底中形成浅沟槽隔离沟槽的方法。 该方法包括在衬底的区域中形成沟槽，在沟槽中形成衬垫，其中衬垫包括第一介电材料，将卤素元件粘合到衬垫上，在沟槽中形成第二电介质材料，退火第一电介质 材料和第二电介质材料，暴露第二介电材料的表面的一部分，并且各向同性地蚀刻第二电介质材料的表面的暴露部分，以在浅沟槽隔离沟槽中形成气隙。

公开(公告)号：US09004914B2

公开(公告)日：2015-04-14

申请号：US13915287

申请日：2013-06-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Chi Ko ,  Chia Cheng Chou ,  Keng-Chu Lin ,  Joung-Wei Liou ,  Shwang-Ming Jeng ,  Mei-Ling Chen

IPC分类号： A01H5/02 ,  H01L21/768 ,  H01L21/3105 ,  H01L21/70 ,  H01L21/02

CPC分类号： H01L21/768 ,  H01L21/02126 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/70 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76828

摘要： An Active Energy Assist (AEA) baking chamber includes an AEA light source assembly and a heater pedestal. The AEA baking chamber further includes a controller for controlling a power input to the AEA light source assembly and a power input to the heater pedestal. A method of forming interconnects on a substrate includes etching a substrate and wet cleaning the etched substrate. The method further includes active energy assist (AEA) baking the substrate after the wet-cleaning. The AEA baking includes placing the substrate on a heater pedestal in an AEA chamber, exposing the substrate to light having a wavelength equal to or greater than 400 nm, wherein said light is emitted by a light source and controlling the light source and the heater pedestal using a controller.

摘要翻译： 主动能量辅助（AEA）烘烤室包括AEA光源组件和加热器底座。 AEA烘烤室还包括控制器，用于控制输入到AEA光源组件的功率和对加热器基座的功率输入。 在衬底上形成互连的方法包括蚀刻衬底并湿式清洗蚀刻的衬底。 该方法还包括在湿清洗之后对基材进行活性能量助剂（AEA）的烘烤。 AEA烘烤包括将基板放置在AEA室中的加热器基座上，将基板暴露于等于或大于400nm的波长的光，其中所述光由光源发射并控制光源和加热器基座 使用控制器。

公开(公告)号：US20150004720A1

公开(公告)日：2015-01-01

申请号：US13929964

申请日：2013-06-28

申请人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

发明人： Yung-Tsun LIU

IPC分类号： H01L21/02

CPC分类号： H01L21/02282 ,  B05D1/005 ,  H01L21/02126 ,  H01L21/02137 ,  H01L21/6715

摘要： A device and method for dispensing liquid spin-on glass (SOG) onto semiconductor wafers. The method includes dispensing liquid SOG through a dispenser nozzle, detecting liquid SOG outside of the dispenser nozzle, indicating the presence of liquid SOG in an abnormal length relative to the dispenser nozzle and adjusting a suck back (SB) valve to withdraw liquid SOG from the abnormal length.

摘要翻译： 一种用于将液体旋涂玻璃（SOG）分配到半导体晶片上的装置和方法。 该方法包括通过分配器喷嘴分配液体SOG，在分配器喷嘴外部检测液体SOG，指示相对于分配器喷嘴处于异常长度的液体SOG的存在，并且调节吸回（SB）阀以从液体SOG中排出液体SOG 异常长度。

公开(公告)号：US20140030432A1

公开(公告)日：2014-01-30

申请号：US13915491

申请日：2013-06-11

申请人： National Chiao Tung University

发明人： Jih-Perng LEU ,  Yu-Han CHEN

IPC分类号： C09D5/00

CPC分类号： C09D5/00 ,  H01L21/02126 ,  H01L21/02137 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/7682 ,  H01L2221/1047

摘要： A method for manufacturing a porous material is disclosed, which comprises the following steps: providing a substrate; coating the substrate with a precursor solution to form a precursor film, wherein the precursor solution includes a precursor compound, a porogen, and a solvent, and the porogen is modified by a surface modification to have an absolute surface electric potential of >25 mV; and treating the precursor film with a thermal curing profile to remove the porogen and form a porous material.

摘要翻译： 公开了一种制造多孔材料的方法，其包括以下步骤：提供基材; 用前体溶液涂覆基材以形成前体膜，其中前体溶液包括前体化合物，致孔剂和溶剂，并且致孔剂通过表面改性改性以具有> 25mV的绝对表面电位; 并用热固化轮廓处理前体膜以除去致孔剂并形成多孔材料。

公开(公告)号：US20130273732A1

公开(公告)日：2013-10-17

申请号：US13915287

申请日：2013-06-11

申请人： Taiwan Semiconductor Manufacturing Company, Ltd.

发明人： Chung-Chi KO ,  Chia Cheng CHOU ,  Keng-Chu LIN ,  Joung-Wei LIOU ,  Shwang-Ming JENG ,  Mei-Ling CHEN

IPC分类号： H01L21/768 ,  H01L21/70

CPC分类号： H01L21/768 ,  H01L21/02126 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02203 ,  H01L21/3105 ,  H01L21/70 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/76814 ,  H01L21/76825 ,  H01L21/76828

摘要： An Active Energy Assist (AEA) baking chamber includes an AEA light source assembly and a heater pedestal. The AEA baking chamber further includes a controller for controlling a power input to the AEA light source assembly and a power input to the heater pedestal. A method of forming interconnects on a substrate includes etching a substrate and wet cleaning the etched substrate. The method further includes active energy assist (AEA) baking the substrate after the wet-cleaning. The AEA baking includes placing the substrate on a heater pedestal in an AEA chamber, exposing the substrate to light having a wavelength equal to or greater than 400 nm, wherein said light is emitted by a light source and controlling the light source and the heater pedestal using a controller.

摘要翻译： 主动能量辅助（AEA）烘烤室包括AEA光源组件和加热器底座。 AEA烘烤室还包括控制器，用于控制输入到AEA光源组件的功率和对加热器基座的功率输入。 在衬底上形成互连的方法包括蚀刻衬底并湿式清洗蚀刻的衬底。 该方法还包括在湿清洗之后对基材进行活性能量助剂（AEA）的烘烤。 AEA烘烤包括将基板放置在AEA室中的加热器基座上，将基板暴露于等于或大于400nm的波长的光，其中所述光由光源发射并控制光源和加热器基座 使用控制器。

公开(公告)号：US08513111B2

公开(公告)日：2013-08-20

申请号：US11485078

申请日：2006-07-12

申请人： Robert P. Meagley ,  Kevin P. O'Brien ,  Tian-An Chen ,  Michael D. Goodner ,  James Powers ,  Huey-Chiang Liou

发明人： Robert P. Meagley ,  Kevin P. O'Brien ,  Tian-An Chen ,  Michael D. Goodner ,  James Powers ,  Huey-Chiang Liou

IPC分类号： H01L23/58

CPC分类号： H01L23/5222 ,  H01L21/02118 ,  H01L21/02134 ,  H01L21/02137 ,  H01L21/02164 ,  H01L21/0234 ,  H01L21/02351 ,  H01L21/312 ,  H01L21/76224 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76829 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor structure may be covered with a thermally decomposing film. That film may then be covered by a sealing cover. Subsequently, the thermally decomposing material may be decomposed, forming a cavity.

摘要翻译： 半导体结构可以被热分解膜覆盖。 然后该膜可以被密封盖覆盖。 随后，热分解材料可能被分解，形成空腔。

公开(公告)号：US20130189836A1

公开(公告)日：2013-07-25

申请号：US13742465

申请日：2013-01-16

申请人： International Business Machines Corporation

发明人： Phillip J. Brock ,  Blake W. Davis ,  Qinghuang Lin ,  Robert D. Miller ,  Alshakim Nelson ,  Jitendra S. Rathore ,  Ratnam Sooriyakumaran

IPC分类号： H01L21/768

CPC分类号： H01L23/5329 ,  C07F7/21 ,  C08G77/50 ,  C08L83/14 ,  G03F7/0045 ,  G03F7/0755 ,  G03F7/0757 ,  G03F7/40 ,  H01L21/02126 ,  H01L21/02137 ,  H01L21/02203 ,  H01L21/02282 ,  H01L21/31 ,  H01L21/76802 ,  H01L21/76808 ,  H01L21/76814 ,  H01L2221/1031 ,  H01L2924/0002 ,  Y10T428/31663 ,  H01L2924/00

摘要： Silsesquioxane polymers that cure to porous silsesquioxane polymers, silsesquioxane polymers that cure to porous silsesquioxane polymers in negative tone photo-patternable dielectric formulations, methods of forming structures using negative tone photo-patternable dielectric formulations containing silsesquioxane polymers that cure to porous silsesquioxane polymers, structures containing porous silsesquioxane polymers and monomers and method of preparing monomers for silsesquioxane polymers that cure to porous silsesquioxane polymers.

摘要翻译： 固化到多孔倍半硅氧烷聚合物的倍半硅氧烷聚合物，在负色调可光图案化电介质配方中固化成多孔倍半硅氧烷聚合物的倍半硅氧烷聚合物，使用含有倍半硅氧烷聚合物的负色调光可图案化介电制剂形成结构的方法，其固化成多孔倍半硅氧烷聚合物， 多孔倍半硅氧烷聚合物和单体以及制备用于聚合多孔倍半硅氧烷聚合物的倍半硅氧烷聚合物的单体的方法。

公开(公告)号：US20110171447A1

公开(公告)日：2011-07-14

申请号：US12027113

申请日：2008-02-06

申请人： Ahila Krishnamoorthy ,  Richard Spear ,  Amanuel Gebrebrhan

发明人： Ahila Krishnamoorthy ,  Richard Spear ,  Amanuel Gebrebrhan

IPC分类号： C09D7/12

CPC分类号： H01L51/5262 ,  C08G77/70 ,  C09D183/04 ,  H01L21/02126 ,  H01L21/02137 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/3122

摘要： Crosslinkable compositions are disclosed herein that comprise at least one silicon-based material comprising at least one alkyl group and at least one aryl or aromatic group, at least one catalyst, and at least one solvent.

摘要翻译： 本文公开的可交联组合物包含至少一种包含至少一个烷基和至少一个芳基或芳族基团的硅基材料，至少一种催化剂和至少一种溶剂。

公开(公告)号：US20100207276A1

公开(公告)日：2010-08-19

申请号：US12772451

申请日：2010-05-03

申请人： Robert D. Allen ,  Phillip J. Brock ,  Blake W. Davis ,  Wu-Song S. Huang ,  Qinghuang Lin ,  Alshakim Nelson ,  Sampath Purushothaman ,  Ratnam Sooriyakumaran

发明人： Robert D. Allen ,  Phillip J. Brock ,  Blake W. Davis ,  Wu-Song S. Huang ,  Qinghuang Lin ,  Alshakim Nelson ,  Sampath Purushothaman ,  Ratnam Sooriyakumaran

IPC分类号： H01L23/522 ,  C09D5/00

CPC分类号： H01L21/76808 ,  H01L21/02137 ,  H01L21/02282 ,  H01L21/02304 ,  H01L21/02348 ,  H01L21/0276 ,  H01L21/3122 ,  H01L21/76802 ,  H01L21/76835 ,  H01L23/5329 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/12044 ,  Y10T428/24802 ,  H01L2924/00

摘要： The present invention provides a method of fabricating an interconnect structure in which a patternable low-k material replaces the need for utilizing a separate photoresist and a dielectric material. Specifically, this invention relates to a simplified method of fabricating single-damascene and dual-damascene low-k interconnect structures with at least one patternable low-k dielectric and at least one inorganic antireflective coating. In general terms, a method is provided that includes providing at least one patternable low-k material on a surface of an inorganic antireflective coating that is located atop a substrate. The inorganic ARC is liquid deposited and comprises a polymer that has at least one monomer unit comprising the formula M-R1 wherein M is at least one of Si, Ge, B, Sn, Fe, Ta, Ti, Ni, Hf and La and R1 is a chromophore. At least one interconnect pattern is formed within the at least one patternable low-k material and thereafter the at least one patternable low-k material is cured. The inventive method can be used to form dual-damascene interconnect structures as well as single-damascene interconnect structures.

摘要翻译： 本发明提供一种制造互连结构的方法，其中可图案化的低k材料替代了使用单独的光致抗蚀剂和电介质材料的需要。 具体地说，本发明涉及一种制备具有至少一个可图案化的低k电介质和至少一种无机抗反射涂层的单镶嵌和双镶嵌低k互连结构的简化方法。 通常，提供了一种方法，其包括在位于基底顶部的无机抗反射涂层的表面上提供至少一种可图案化的低k材料。 无机ARC是液体沉积的，并且包含具有至少一个单体单元的聚合物，该单体单元包括式M-R1，其中M是Si，Ge，B，Sn，Fe，Ta，Ti，Ni，Hf和La中的至少一种， R1是发色团。 在至少一个可模制的低k材料内形成至少一个互连图案，此后至少一个可图案化的低k材料固化。 本发明的方法可用于形成双镶嵌互连结构以及单镶嵌互连结构。