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公开(公告)号:US10564352B1
公开(公告)日:2020-02-18
申请号:US16543441
申请日:2019-08-16
Applicant: Cisco Technology, Inc.
Inventor: Sandeep Razdan , Ashley J. Maker , Matthew J. Traverso , Mark A. Webster , Jock T. Bovington
Abstract: Aspects described herein include a method comprising forming an insulator layer above a silicon layer of a silicon-on-insulator (SOI) substrate. A first optical device is formed partly in the silicon layer and partly in the insulator layer. A first optical waveguide is formed in the insulator layer and optically coupled with the first optical device. The method further comprises forming conductive contacts extending partly through the insulator layer to the first optical device, bonding a first surface of an interposer with a top surface of the insulator layer, and forming, from a second surface of the interposer opposite the first surface, a plurality of first conductive vias extending at least partly through the interposer. The plurality of first conductive vias are coupled with the conductive contacts.
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公开(公告)号:US10545291B1
公开(公告)日:2020-01-28
申请号:US16115432
申请日:2018-08-28
Applicant: Cisco Technology, Inc.
Inventor: Sean P. Anderson , Dominic F. Siriani , Jock T. Bovington , Matthew J. Traverso , Vipulkumar Patel
Abstract: The embodiments herein describe an optical transmitter that integrates a SCOWA into a photonic chip that includes a modulator. The embodiments herein place the SCOWA between the laser and the modulator. To accommodate the large mode size of the waveguide in the SCOWA, the photonic chip includes a pair of spot size converters coupled to the input and output of the SCOWA. Rather than amplifying a modulated signal as is typical with an inline amplifier, the SCOWA amplifies a continuous wave (CW) optical signal generated by the laser which introduces less noise and improves the OSNR of the transmitter.
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公开(公告)号:US10393959B1
公开(公告)日:2019-08-27
申请号:US16172702
申请日:2018-10-26
Applicant: Cisco Technology, Inc.
Inventor: Sandeep Razdan , Ashley J. Maker , Matthew J. Traverso , Mark A. Webster , Jock T. Bovington
Abstract: A method comprises bonding a first surface of an interposer wafer with a first exterior surface of a photonic wafer assembly. The photonic wafer assembly comprises one or more optical devices coupled with one or more metal layers and with one or more first optical waveguides. The method further comprises forming, from a second surface opposite the first surface, a plurality of first conductive vias extending at least partway through the interposer wafer and coupled with the one or more metal layers. The method further comprises forming, at the second surface, a plurality of first conductive pads coupled with the plurality of first conductive vias. The method further comprises forming one or more second conductive pads coupled with the one or more metal layers. The one or more second conductive pads are accessible at a second exterior surface of the photonic wafer assembly opposite the first exterior surface.
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公开(公告)号:US12255690B2
公开(公告)日:2025-03-18
申请号:US18177992
申请日:2023-03-03
Applicant: Cisco Technology, Inc.
Inventor: Jock T. Bovington , Matthew J. Traverso
Abstract: A pluggable device and method are presented. The pluggable device includes a substrate, a first pin positioned on the substrate, an optical source positioned on the substrate, and an integrated circuit positioned on the substrate. The optical source produces a source optical signal and transmits the source optical signal through the first pin. The integrated circuit transmits a received optical data signal and transmits a data signal based on a portion of the optical data signal.
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公开(公告)号:US11756861B2
公开(公告)日:2023-09-12
申请号:US17663072
申请日:2022-05-12
Applicant: Cisco Technology, Inc.
Inventor: Ashley J. M. Erickson , Matthew J. Traverso , Sandeep Razdan , Joyce J. M. Peternel , Aparna R. Prasad
IPC: H01L23/473 , H01L21/48 , H01L21/683 , H01L23/00 , H01L21/78 , H01L23/544
CPC classification number: H01L23/473 , H01L21/4803 , H01L21/6835 , H01L21/78 , H01L23/544 , H01L24/32 , H01L24/83 , H01L24/97 , H01L2221/68345 , H01L2223/54426 , H01L2224/32225
Abstract: An opto-electronic package is described. The opto-electronic package is manufactured using a fan out wafer level packaging to produce dies/frames which include connection features. Additional structures such as heat exchanged structures are joined to a connection component and affixed to packages, using the connection features, to provide structural support and heat exchange to heat generating components in the package, among other functions.
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公开(公告)号:US11728622B2
公开(公告)日:2023-08-15
申请号:US16290698
申请日:2019-03-01
Applicant: Cisco Technology, Inc.
Inventor: Dominic F. Siriani , Vipulkumar K. Patel , Matthew J. Traverso , Mark A. Webster
CPC classification number: H01S5/101 , H01S5/1003 , H01S5/1014 , H01S5/22 , H01S5/34 , H01S5/341 , H01S5/50 , H01S5/1025 , H01S5/146
Abstract: An optical apparatus comprises a semiconductor substrate and an optical waveguide emitter. The optical waveguide emitter comprises an input waveguide section extending from a facet of the semiconductor substrate, a turning waveguide section optically coupled with the input waveguide section, and an output waveguide section extending to the same facet and optically coupled with the turning waveguide section. One or more of the input waveguide section, the turning waveguide section, and the output waveguide section comprises an optically active region.
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27.
公开(公告)号:US11614578B2
公开(公告)日:2023-03-28
申请号:US17446013
申请日:2021-08-26
Applicant: Cisco Technology, Inc.
Inventor: Jock T. Bovington , Matthew J. Traverso , Mark C. Nowell
Abstract: Aspects include a pluggable optical device and related optical system. The pluggable optical device comprises a housing, a printed circuit board (PCB) within the housing, and one or more blind mate optical connectors attached to the PCB along a first end of the PCB. The pluggable optical device further comprises one or more electrical contacts of the PCB near the first end, one or more external optical connectors arranged near a second end of the PCB opposite the first end, and one or more optical components attached to the PCB and included in optical paths extending between the one or more external optical connectors and the one or more blind mate optical connectors.
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公开(公告)号:US11418005B2
公开(公告)日:2022-08-16
申请号:US16581923
申请日:2019-09-25
Applicant: Cisco Technology, Inc.
Inventor: Dominic F. Siriani , Vipulkumar K. Patel , Jock T. Bovington , Matthew J. Traverso
IPC: H01S5/00 , H01S5/026 , H01S3/23 , H01L31/0304 , G02B6/12 , H01S5/14 , H01S5/10 , H01S5/50 , H01S5/028 , H01S5/02
Abstract: Described herein is a two chip photonic device (e.g., a hybrid master oscillator power amplifier (MOPA)) where a gain region and optical amplifier region are formed on a III-V chip and a variable reflector (which in combination with the gain region forms a laser cavity) is formed on a different semiconductor chip that includes silicon, silicon nitride, lithium niobate, or the like. Sides of the two chips are disposed in a facing relationship so that optical signals can transfer between the gain region, the variable reflector, and the optical amplifier.
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公开(公告)号:US11043478B2
公开(公告)日:2021-06-22
申请号:US15961163
申请日:2018-04-24
Applicant: Cisco Technology, Inc.
Inventor: Matthew J. Traverso , Sandeep Razdan , Ashley J. Maker
IPC: H01L23/00 , H01L25/16 , H01L31/02 , H01L23/498 , H01L21/48
Abstract: An optoelectronic assembly and methods of fabrication thereof are provided. The assembly includes a mold compound; a photonic integrated circuit (PIC) embedded in the mold compound, that has a face exposed from the mold compound in a first plane; an interposer embedded in the mold compound, that has a face exposed from the mold compound in the first plane (i.e., co-planar with the exposed face of the PIC); and an electrical integrated circuit (EIC) coupled to the exposed face of the PIC and the exposed face of the interposer, that establishes bridging electrical connections between the PIC and the interposer.
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30.
公开(公告)号:US10746934B2
公开(公告)日:2020-08-18
申请号:US16058608
申请日:2018-08-08
Applicant: Cisco Technology, Inc.
Inventor: Vipulkumar Patel , Matthew J. Traverso , Ashley J. Maker , Jock T. Bovington
Abstract: By determining an alignment point for a photonic element in a substrate of a given material; applying, via a laser aligned with the photonic element according to the alignment point, an etching pattern to the photonic element to produce a patterned region and an un-patterned region in the photonic element, wherein applying the etching pattern alters a chemical bond in the given material for the patterned region of the photonic element that increases a reactivity of the given material to an etchant relative to a reactivity of the un-patterned region, and wherein the patterned region defines an engagement feature in the un-patterned region that is configured to engage with a mating feature on a Photonic Integrated Circuit (PIC); and removing the patterned region from the photonic element via the etchant, various systems and methods may make use of laser patterning in optical components to enable alignment of optics to chips.
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