公开(公告)号：US06897523B2

公开(公告)日：2005-05-24

申请号：US10211705

申请日：2002-08-05

申请人： Shuichi Ueno ,  Haruo Furuta ,  Shigehiro Kuge ,  Hiroshi Kato

发明人： Shuichi Ueno ,  Haruo Furuta ,  Shigehiro Kuge ,  Hiroshi Kato

IPC分类号： H01L29/78 ,  H01L29/792 ,  H01L29/861 ,  H01L29/788 ,  H01L21/336

CPC分类号： H01L29/792 ,  H01L29/8616

摘要： A semiconductor device is provided which includes a diode formed of a MISFET and having a current-voltage characteristic close to that of an ideal diode. Negatively charged particles (e.g. electrons: 8a) are trapped on the drain region (2) side of a silicon nitride film (4b) sandwiched between films of silicon oxide (4a, 4c). When a bias voltage is applied between the drain and source with the negatively charged particles (8a) thus trapped and in-channel charged particles (9a) induced by them, the MISFET exhibits different threshold values for channel formation depending on whether it is a forward bias or a reverse bias. That is to say, when a reverse bias is applied, the channel forms insufficiently and the source-drain current is less likely to flow, while the channel forms sufficiently and a large source-drain current flows when a forward bias is applied. This offers a current-voltage characteristic close to that of the ideal diode.

摘要翻译： 提供一种半导体器件，其包括由MISFET形成的二极管，其具有接近于理想二极管的电流 - 电压特性。 负电粒子（例如电子：8a）被捕获在夹在氧化硅（4a，4c）的膜之间的氮化硅膜（4b）的漏极区（2）侧上。 当在漏极和源极之间施加偏置电压时，带负电荷的颗粒（8a）被这样捕获并且由它们引起的通道内带电粒子（9a），MISFET对通道形成具有不同的阈值，取决于它是否是 正向偏压或反向偏压。 也就是说，当施加反向偏压时，沟道形成不充分，并且源极 - 漏极电流不太可能流动，而沟道形成充分，并且当施加正向偏压时流过大的源极 - 漏极电流。 这提供了接近理想二极管的电流电压特性。

公开(公告)号：US06770522B2

公开(公告)日：2004-08-03

申请号：US10444959

申请日：2003-05-27

申请人： Yoshinori Okumura ,  Shuichi Ueno ,  Haruo Furuta

发明人： Yoshinori Okumura ,  Shuichi Ueno ,  Haruo Furuta

IPC分类号： H01L218238

CPC分类号： H01L21/823418 ,  H01L21/823462 ,  H01L21/823468 ,  H01L27/1052

摘要： A semiconductor device and a manufacturing method thereof which is suited for forming both a transistor for a memory cell and a transistor for a high voltage circuit part on one semiconductor substrate, and moreover, has little deterioration of an electric characteristic in the structure that a sidewall insulating film in a shared contact plug part is removed is provided. An active layer is formed by performing an additional impurity injection on a part where a sidewall insulating film is removed in a forming portion of a shared contact plug. An insulating film is laminated in a high voltage circuit part and a sidewall insulating film of wide width is formed. According to this, a forming width of a sidewall insulating film can be made small in a MOS transistor for a memory cell part, and a forming width of a sidewall insulating film can be made large in a MOS transistor for a high voltage circuit part. Thereupon, in the high voltage circuit part, a source/drain active layer can be formed in the position more distant from a gate electrode.

摘要翻译： 一种半导体器件及其制造方法，其适用于在一个半导体基板上形成用于存储单元的晶体管和高电压电路部分的晶体管，此外，在侧壁 提供了共享接触插塞部件中的绝缘膜。 通过在共享接触插塞的形成部分中去除侧壁绝缘膜的部分上执行附加杂质注入来形成有源层。 在高压电路部分层叠绝缘膜，形成宽幅的侧壁绝缘膜。 因此，可以在用于存储单元部分的MOS晶体管中使侧壁绝缘膜的形成宽度小，并且在用于高电压电路部分的MOS晶体管中可以使侧壁绝缘膜的形成宽度大。 因此，在高电压电路部分中，可以在远离栅电极的位置形成源极/漏极有源层。

公开(公告)号：US20070190724A1

公开(公告)日：2007-08-16

申请号：US11690704

申请日：2007-03-23

申请人： Yasuyoshi Itoh ,  Shuuichi Ueno ,  Haruo Furuta ,  Natsuo Ajika

发明人： Yasuyoshi Itoh ,  Shuuichi Ueno ,  Haruo Furuta ,  Natsuo Ajika

IPC分类号： H01L21/336

CPC分类号： H01L29/66833 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/40117 ,  H01L29/42352 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/66583 ,  H01L29/7833 ,  H01L29/7923

摘要： It is an object to provide a semiconductor device capable of holding multibit information in one memory cell also when scaling for a nonvolatile memory progresses, and a method of manufacturing the semiconductor device. A trench (TRI) is formed in a channel portion of an MONOS transistor. Then, a source side portion and a drain side portion in a silicon nitride film (122) of a gate insulating film (120) which interpose the trench (TR1) are caused to function as first and second electric charge holding portions capable of holding electric charges (CH1) and (CH2). In the case in which the electric charges (CH1) are trapped and the electric charges (CH2) are then trapped, thus, a portion (130a) of a gate electrode (130) in the trench (TR1) functions as a shield. If a fixed potential is given to the gate electrode (130), the second electric charge holding portion is not influenced by an electric field (EF1) induced by the electric charges (CH1) so that the trapping of the electric charges (CH2) is not inhibited.

摘要翻译： 本发明的目的是提供一种能够在非易失性存储器的缩放进行时能够在一个存储单元中保持多位信息的半导体器件，以及半导体器件的制造方法。 在MONOS晶体管的沟道部分中形成沟槽（TRI）。 然后，使位于沟槽（TR1）的栅极绝缘膜（120）的氮化硅膜（122）中的源极侧部分和漏极侧部分作为能够保持的第一和第二电荷保持部 电荷（CH 1）和（CH 2）。 在电荷（CH 1）被捕获并且电荷（CH 2）然后被捕获的情况下，因此，沟槽（TR 1）中的栅电极（130）的部分（130a）用作 一个盾牌 如果向栅电极（130）施加固定电位，则第二电荷保持部不受电荷（CH 1）引起的电场（EF 1）的影响，使得电荷（CH 2）不被抑制。

公开(公告)号：US4485413A

公开(公告)日：1984-11-27

申请号：US303558

申请日：1981-09-23

申请人： Haruo Furuta ,  Toshiji Fujita ,  Chihiko Yamada ,  Masaki Nojima

发明人： Haruo Furuta ,  Toshiji Fujita ,  Chihiko Yamada ,  Masaki Nojima

IPC分类号： G03F3/08 ,  H04N1/00 ,  H04N1/50 ,  H04N1/64 ,  H04N9/495

CPC分类号： H04N1/00294 ,  H04N1/508 ,  H04N1/646 ,  H04N1/00291

摘要： A color television video signal is directly read out in synchronism to the scanning speed of a scanner, the video signal thus read out is converted into three primary color signals, and these three primary color signals are in turn converted into process video signals, which are supplied to the scanner. A printing plate can be produced directly from a television video signal without requiring any color picture original.

摘要翻译： 与扫描仪的扫描速度同步地直接读出彩色电视视频信号，由此读出的视频信号被转换为三原色信号，这三个原色信号又被转换为处理视频信号， 提供给扫描仪。 可以直接从电视视频信号产生印版，而不需要原始的彩色图像。

公开(公告)号：US20050169050A1

公开(公告)日：2005-08-04

申请号：US11052142

申请日：2005-02-08

申请人： Yasuyoshi Itoh ,  Shuuichi Ueno ,  Haruo Furuta ,  Natsuo Ajika

发明人： Yasuyoshi Itoh ,  Shuuichi Ueno ,  Haruo Furuta ,  Natsuo Ajika

IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  G11C11/34

CPC分类号： H01L29/66833 ,  H01L21/26586 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/40117 ,  H01L29/42352 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/66583 ,  H01L29/7833 ,  H01L29/7923

摘要： It is an object to provide a semiconductor device capable of holding multibit information in one memory cell also when scaling for a nonvolatile memory progresses, and a method of manufacturing the semiconductor device. A trench (TR1) is formed in a channel portion of an MONOS transistor. Then, a source side portion and a drain side portion in a silicon nitride film (122) of a gate insulating film (120) which interpose the trench (TR1) are caused to function as first and second electric charge holding portions capable of holding electric charges (CH1) and (CH2). In the case in which the electric charges (CH1) are trapped and the electric charges (CH2) are then trapped, thus, a portion (130a) of a gate electrode (130) in the trench (TR1) functions as a shield. If a fixed potential is given to the gate electrode (130), the second electric charge holding portion is not influenced by an electric field (EF1) induced by the electric charges (CH1) so that the trapping of the electric charges (CH2) is not inhibited.

摘要翻译： 本发明的目的是提供一种能够在非易失性存储器的缩放进行时能够在一个存储单元中保持多位信息的半导体器件，以及半导体器件的制造方法。 沟槽（TR 1）形成在MONOS晶体管的沟道部分中。 然后，使位于沟槽（TR1）的栅极绝缘膜（120）的氮化硅膜（122）中的源极侧部分和漏极侧部分作为能够保持的第一和第二电荷保持部 电荷（CH 1）和（CH 2）。 在电荷（CH 1）被捕获并且电荷（CH 2）然后被捕获的情况下，因此，沟槽（TR 1）中的栅电极（130）的部分（130a）用作 一个盾牌 如果向栅电极（130）施加固定电位，则第二电荷保持部不受电荷（CH 1）引起的电场（EF 1）的影响，使得电荷（CH 2）不被抑制。

公开(公告)号：US4411945A

公开(公告)日：1983-10-25

申请号：US247030

申请日：1981-03-24

申请人： Mutsuo Akao ,  Haruo Furuta

发明人： Mutsuo Akao ,  Haruo Furuta

IPC分类号： B32B27/32 ,  G11B23/087 ,  B32B5/16 ,  B32B27/08

CPC分类号： B32B27/32 ,  G11B23/08764 ,  Y10S264/73 ,  Y10S428/90 ,  Y10S428/906 ,  Y10S428/91 ,  Y10T428/24355 ,  Y10T428/24975 ,  Y10T428/256 ,  Y10T428/30 ,  Y10T428/31 ,  Y10T428/31667 ,  Y10T428/31692 ,  Y10T428/31699 ,  Y10T428/31884 ,  Y10T428/31888 ,  Y10T428/31906 ,  Y10T428/31913 ,  Y10T428/31928

摘要： A friction sheet is described consisting of a single layer or a laminated layer comprising an at least uniaxially oriented high density polyethylene film having a density of at least 0.94 g/cm.sup.3.

摘要翻译： 描述了由单层或层压层组成的摩擦片，所述单层或层压层包含密度至少为0.94g / cm 3的至少单轴取向的高密度聚乙烯膜。

公开(公告)号：US06921947B2

公开(公告)日：2005-07-26

申请号：US10014345

申请日：2001-12-14

申请人： Haruo Furuta ,  Tomohiro Yamashita

发明人： Haruo Furuta ,  Tomohiro Yamashita

IPC分类号： H01L21/8234 ,  H01L21/8242 ,  H01L29/94

CPC分类号： H01L21/823462 ,  H01L21/823481 ,  H01L27/10873 ,  H01L27/10894

摘要： A semiconductor device and a manufacturing method therefor reduce the occurrence of variation in threshold voltage of a MOS transistor formed by a dual oxide process, thereby to improve manufacturing yield. On the main surface of a semiconductor substrate (1), gate oxide films (GX1, GX2) of different thickness are located in active regions (3A, 3B), respectively, and gate electrodes (GT1, GT2) are located on top of the gate oxide films (GX1, GX2), respectively. An isolation insulating film (2) which defines the active region (3A) in a thick-film portion (AR) has an excessively removed edge portion on the side of a MOS transistor (100) and thereby a recessed portion (DP) is formed in the edge portion of the active region (3A). On the other hand, an edge portion of the isolation insulating film (2) in a thin-film portion (BR) on the side of a MOS transistor (200) is not excessively removed.

摘要翻译： 一种半导体器件及其制造方法减少了由双氧化物工艺形成的MOS晶体管的阈值电压的变化的发生，从而提高了制造成品率。 在半导体基板（1）的主表面上，不同厚度的栅氧化物膜（GX 1，GX 2）分别位于有源区（3A，3B）中，栅电极（GT 1，GT 2） 分别位于栅氧化膜（GX 1，GX 2）的顶部。 限定厚膜部分（AR）中的有源区（3A）的隔离绝缘膜（2）在MOS晶体管（100）侧具有过度去除的边缘部分，从而凹部（DP）为 形成在有源区（3A）的边缘部分。 另一方面，在MOS晶体管（200）一侧的薄膜部分（BR）中的隔离绝缘膜（2）的边缘部分不会被过度去除。

公开(公告)号：US06867455B2

公开(公告)日：2005-03-15

申请号：US10600344

申请日：2003-06-23

申请人： Yasuyoshi Itoh ,  Shuuichi Ueno ,  Haruo Furuta ,  Natsuo Ajika

发明人： Yasuyoshi Itoh ,  Shuuichi Ueno ,  Haruo Furuta ,  Natsuo Ajika

IPC分类号： H01L21/8247 ,  H01L21/28 ,  H01L21/336 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792 ,  H01L29/76

CPC分类号： H01L29/66833 ,  H01L21/26586 ,  H01L21/28282 ,  H01L27/115 ,  H01L27/11568 ,  H01L29/42352 ,  H01L29/42368 ,  H01L29/513 ,  H01L29/66545 ,  H01L29/66583 ,  H01L29/7833 ,  H01L29/7923

摘要： A semiconductor device capable of holding multibit information in one memory cell, and a method of manufacturing the semiconductor device. A trench is formed in a channel portion of an MONOS transistor. Then, a source side portion and a drain side portion in a silicon nitride film of a gate insulating film which interpose the trench are caused to function as first and second electric charge holding portions capable of holding electric charges. In the case in which first electric charges are trapped on the drain side and second electric charges are trapped on the source side, a portion of a gate electrode in the trench functions as a shield. If a fixed potential is given to the gate electrode, the second electric charge holding portion is not influenced by an electric field induced by the first electric charges so that the trapping of the second electric charges is not inhibited.

摘要翻译： 一种能够将多位信息保持在一个存储单元中的半导体器件，以及半导体器件的制造方法。 在MONOS晶体管的沟道部分中形成沟槽。 然后，使介入沟槽的栅极绝缘膜的氮化硅膜中的源极侧部分和漏极侧部分作为能够保持电荷的第一和第二电荷保持部分起作用。 在第一电荷被捕获在漏极侧并且第二电荷被捕获在源极侧的情况下，沟槽中的栅电极的一部分用作屏蔽。 如果向栅电极施加固定电位，则第二电荷保持部不受第一电荷引起的电场的影响，从而不抑制第二电荷的捕获。

公开(公告)号：US4961450A

公开(公告)日：1990-10-09

申请号：US349287

申请日：1989-05-09

申请人： Haruo Furuta

发明人： Haruo Furuta

IPC分类号： G03G15/08

CPC分类号： G03G15/0882 ,  Y10S222/01

摘要： A toner cartridge comprising a toner container body having an opening and a mouth ring member provided at the opening. The mouth ring member has a bonding and non-bonding region where the sealing film is attached at the bonding region. A lid is supported under the sealing film by the non-bonding region in such a manner that when the sealing film is peeled off, the lid slides and allows the toner to dispense into the toner box.

摘要翻译： 一种调色剂盒，包括具有开口的调色剂容器体和设置在开口处的口环构件。 口环构件具有在接合区域附接有密封膜的接合和非接合区域。 盖子通过非接合区域被支撑在密封膜下方，使得当密封膜被剥离时，盖子滑动并允许调色剂分配到调色剂盒中。

公开(公告)号：US4834246A

公开(公告)日：1989-05-30

申请号：US174433

申请日：1988-03-28

申请人： Yoshio Inoue ,  Haruo Furuta

发明人： Yoshio Inoue ,  Haruo Furuta

IPC分类号： G03G15/08

CPC分类号： G03G15/0886 ,  G03G15/0882

摘要： A disposable toner cartridge includes a cartridge container having a bottom opening for discharging toner and a sealing film that may be peeled off of the bottom opening in a first direction. A covering member is attached to the cartridge container beneath the sealing film and engages the sealing film such that movement of the covering member in a first direction seals the sealing film from the bottom opening and in a second direction reseals the bottom opening with the sealing film.

摘要翻译： 一次性调色剂盒包括具有用于排出调色剂的底部开口和可沿第一方向从底部开口剥离的密封膜的盒容器。 覆盖构件附接到密封膜下方的墨盒容器并与密封膜接合，使得覆盖构件在第一方向上的运动将密封膜从底部开口密封并且在第二方向上与密封膜重新密封底部开口 。