公开(公告)号：US20170287772A1

公开(公告)日：2017-10-05

申请号：US15630579

申请日：2017-06-22

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt

IPC: H01L21/764 ,  H01L29/78 ,  H01L29/06 ,  H01L21/762 ,  B81C1/00 ,  H01L21/324 ,  H01L27/12

CPC classification number: H01L21/764 ,  B81B2203/0315 ,  B81C1/00047 ,  B81C2201/0116 ,  H01L21/3247 ,  H01L21/7624 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/7833

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.

公开(公告)号：US20170104187A1

公开(公告)日：2017-04-13

申请号：US15387772

申请日：2016-12-22

Applicant: Infineon Technologies Dresden GmbH

Inventor： Alessia Scire ,  Dieter Kaiser ,  Tarja Hauck ,  Frank Zschorlich

IPC: H01L51/56 ,  H01L51/52 ,  H01L27/32

CPC classification number: H01L51/56 ,  H01L27/288 ,  H01L27/3276 ,  H01L31/0224 ,  H01L31/02327 ,  H01L31/16 ,  H01L51/5275

Abstract: According to various embodiments, an optoelectronic component may be provided, the optoelectronic component including: an electrode structure disposed at least one of over and in a carrier; and a grating structure disposed over the electrode structure, the grating structure including at least a first region and a second region, wherein the first region of the grating structure includes amorphous silicon; and wherein the second region of the grating structure includes a material having a refractive index different from the refractive index of the amorphous silicon.

公开(公告)号：US09560765B2

公开(公告)日：2017-01-31

申请号：US14098591

申请日：2013-12-06

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt ,  Franz Hirler ,  Anton Mauder ,  Wolfgang Scholz ,  Hans-Joachim Schulze ,  Francisco Javier Santos Rodriguez

IPC: H05K1/18 ,  H05K1/02 ,  H05K3/30 ,  H01L27/12

CPC classification number: H01L27/1207 ,  H01L21/761 ,  H01L21/76283 ,  H01L21/764 ,  H01L21/76895 ,  H01L21/823487 ,  H01L29/7397 ,  H01L29/7813 ,  H05K1/0256 ,  H05K1/0284 ,  H05K1/183 ,  H05K3/30 ,  H05K2201/10522 ,  Y10T29/4913

Abstract: According to various embodiments, an electronic device may include a carrier including at least a first region and a second region being laterally adjacent to each other; an electrically insulating structure arranged in the first region of the carrier, wherein the second region of the carrier is free of the electrically insulating structure; a first electronic component arranged in the first region of the carrier over the electrically insulating structure; a second electronic component arranged in the second region of the carrier; wherein the electrically insulating structure includes one or more hollow chambers, wherein the sidewalls of the one or more hollow chambers are covered with an electrically insulating material.

Abstract translation: 根据各种实施例，电子设备可以包括载体，其包括至少第一区域和彼此横向相邻的第二区域; 布置在所述载体的所述第一区域中的电绝缘结构，其中所述载体的所述第二区域没有所述电绝缘结构; 布置在电绝缘结构上的载体的第一区域中的第一电子部件; 布置在所述载体的第二区域中的第二电子部件; 其中所述电绝缘结构包括一个或多个中空室，其中所述一个或多个中空室的侧壁被电绝缘材料覆盖。

公开(公告)号：US09236241B2

公开(公告)日：2016-01-12

申请号：US14269260

申请日：2014-05-05

Applicant: Infineon Technologies Dresden GmbH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt ,  Uwe Rudolph ,  Marco Mueller ,  Boris Binder

IPC: H01L21/302 ,  H01L21/02

CPC classification number: H01L21/02002 ,  H01L21/02005 ,  H01L21/304 ,  H01L21/306 ,  H01L21/3065 ,  H01L21/3083 ,  H01L21/764 ,  H01L21/7806 ,  Y10T156/1057 ,  Y10T156/11 ,  Y10T428/13

Abstract: According to various embodiments, a method for processing a wafer may include: forming at least one hollow chamber and a support structure within the wafer, the at least one hollow chamber defining a cap region of the carrier located above the at least one hollow chamber and a bottom region of the carrier located below the at least one hollow chamber and an edge region surrounding the cap region of the carrier, wherein a surface area of the cap region is greater than a surface area of the edge region, and wherein the cap region is connected to the bottom region by the support structure; removing the cap region in one piece from the bottom region and the edge region.

Abstract translation: 根据各种实施例，用于处理晶片的方法可以包括：在晶片内形成至少一个中空室和支撑结构，所述至少一个中空室限定位于至少一个中空室上方的载体的盖区域， 位于所述至少一个中空室下方的所述载体的底部区域和围绕所述载体的所述盖区域的边缘区域，其中所述盖区域的表面积大于所述边缘区域的表面积，并且其中所述盖区域 通过支撑结构连接到底部区域; 从底部区域和边缘区域去除一个部分的帽区域。

公开(公告)号：US20150147839A1

公开(公告)日：2015-05-28

申请号：US14089805

申请日：2013-11-26

Applicant: Infineon Technologies Dresden GmbH

Inventor： Alessia Scire ,  Alfred Vater ,  Mirko Vogt ,  Momtchil Stavrev ,  Tarja Hauck ,  Bee Kim Hong ,  Heiko Estel

IPC: H01L21/306 ,  H01L51/00 ,  H01L21/3065

CPC classification number: H01L51/0023 ,  H01L51/5218

Abstract: A method for manufacturing a semiconductor device may include: forming a metal layer structure over a semiconductor workpiece; forming a first layer over the metal layer structure, the first layer including a first material; forming at least one opening in the first layer and the metal layer structure; depositing a second layer to fill the at least one opening and at least partially cover a surface of the first layer facing away from the metal layer structure, the second layer including a second material that is different from the first material; removing the second layer from at least the surface of the first layer facing away from the metal layer structure; and removing the first layer.

Abstract translation: 半导体器件的制造方法可以包括：在半导体工件上形成金属层结构; 在所述金属层结构上形成第一层，所述第一层包括第一材料; 在所述第一层和所述金属层结构中形成至少一个开口; 沉积第二层以填充所述至少一个开口并且至少部分地覆盖所述第一层的远离所述金属层结构的表面，所述第二层包括不同于所述第一材料的第二材料; 从至少所述第一层的远离所述金属层结构的表面移除所述第二层; 并移除第一层。

公开(公告)号：US20140097521A1

公开(公告)日：2014-04-10

申请号：US13648170

申请日：2012-10-09

Applicant: INFINEON TECHNOLOGIES DRESDEN GMBH

Inventor： Thoralf Kautzsch ,  Alessia Scire ,  Steffen Bieselt

IPC: H01L29/02 ,  H01L21/26 ,  H01L21/302

CPC classification number: H01L21/764 ,  B81B2203/0315 ,  B81C1/00047 ,  B81C2201/0116 ,  H01L21/3247 ,  H01L21/7624 ,  H01L27/1203 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/7833

Abstract: In accordance with an embodiment of the present invention, a method of forming a semiconductor device includes forming a first cavity within a substrate. The first cavity is disposed under a portion of the substrate. The method further includes forming a first pillar within the first cavity to support the portion of the substrate.

Abstract translation: 根据本发明的实施例，形成半导体器件的方法包括在衬底内形成第一空腔。 第一空腔设置在基板的一部分下方。 该方法还包括在第一腔内形成第一支柱以支撑衬底的该部分。