公开(公告)号：US20200228162A1

公开(公告)日：2020-07-16

申请号：US16833818

申请日：2020-03-30

Applicant: Intel Corporation

Inventor： Bernard Arambepola ,  Thushara Hewavithana ,  Noam Tal ,  Shaul Shulman

IPC: H04B3/46 ,  H04B3/32 ,  H04B3/487 ,  H04N21/61 ,  H04L12/28 ,  H04L12/26 ,  H04B17/345

Abstract: A cable modem system for discovering interference groups (IGs) includes an infrastructure and a cable modem termination system (CMTS). The infrastructure is for transferring data. The CMTS is configured to initiate generation of test signals by a set of cable modems (CMs), obtain a set of test measurements for the set of CMs, discover interference groups (IGs) of the set of CMs based on the obtained set of test measurements and assign a plurality of upstream and downstream channels for the set of CMs that use orthogonal frequency division multiplexing (OFDM) based on the discovered IGs.

公开(公告)号：US20200162230A1

公开(公告)日：2020-05-21

申请号：US16601611

申请日：2019-10-15

Applicant: Intel Corporation

Inventor： Boaz Kol ,  Noam Tal ,  Shaul Shulman ,  Thushara Hewavithana

IPC: H04L5/14 ,  H04B3/21 ,  H04L27/00 ,  H04L27/148

Abstract: A cable modem supporting full duplex (FDX) operations. The cable modem includes a transmit circuitry configured to process a transmit signal and a receive circuitry configured to process a receive signal. The receive circuitry includes a switchable analog filter configured to filter the receive signal. The switchable analog filter is configurable for different passband frequencies. The receive circuitry also includes a digital compensation filter configured to compensate a difference in frequency response in a specific frequency band due to switching of the switchable analog filter for a different passband frequency. The cable modem also includes an adjacent channel interference (ACI) cancellation filter and an adjacent leakage interference (ALI) cancellation filter. A digital compensation filter is also used in processing the ACI cancellation signal and the ALI cancellation signal to impose or compensate the difference in frequency response due to the switchable analog filter switching.

公开(公告)号：US20190173609A1

公开(公告)日：2019-06-06

申请号：US16177219

申请日：2018-10-31

Applicant: Intel Corporation

Inventor： Bernard Arambepola ,  Noam Tal ,  Sahan S. Gamage ,  Thushara Hewavithana ,  Shaul Shulman

IPC: H04L1/00 ,  H04L27/00 ,  H04L27/26 ,  H04L5/00

Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.

公开(公告)号：US20180316523A1

公开(公告)日：2018-11-01

申请号：US15639196

申请日：2017-06-30

Applicant: Intel Corporation

Inventor： Thushara Hewavithana ,  Bernard Arambepola

IPC: H04L25/03 ,  H04L25/02

CPC classification number: H04L25/03821 ,  H04L25/02 ,  H04L25/0216 ,  H04L25/0222 ,  H04L25/03159 ,  H04L25/03292 ,  H04L27/2607 ,  H04L27/2647 ,  H04L27/2691

Abstract: An inter-carrier interference (ICI) mitigation circuit associated with an orthogonal frequency division multiplexing (OFDM) receiver is disclosed. The ICI mitigation circuit comprises an ICI cancellation circuit configured to receive an OFDM symbol associated with an OFDM signal and determine an ICI associated with one or more OFDM subcarriers within the OFDM symbol. The ICI cancellation circuit is further configured to cancel the ICI from the one or more OFDM subcarriers associated with the OFDM symbol, in order to generate a desired OFDM symbol. In some embodiments, the ICI is determined and cancelled at the ICI cancellation circuit, in accordance with a predetermined ICI mitigation algorithm.

公开(公告)号：US09385905B2

公开(公告)日：2016-07-05

申请号：US14197151

申请日：2014-03-04

Applicant: Intel Corporation

Inventor： Bernard Arambepola ,  Thushara Hewavithana

IPC: H04L27/26 ,  H04L1/00

CPC classification number: H04L27/2608 ,  H04L1/0071 ,  H04L5/0007 ,  H04L5/0062 ,  H04L27/2634

Abstract: Block-based interleaving to process a block of sub-carriers as a two-dimensional array defined by a frequency dimension and a time dimension. For each symbol of the array a cell is selected at each frequency index of the array in a diagonal wrap-around fashion. The array may be traversed with a modulo-based index computed as a function of an incrementing frequency index, a symbol index, and a modulus defined by a depth of the array. Cells may be selected as indicated by the frequency and time indices, and/or as indicated by a bit-reversed representation of the frequency index and/or the time index. A block interleaver may be configured to time interleave without impacting frequency, or interleave in time and frequency. Frequency interleaving may performed with the bit-reversed representation of the frequency index.

Abstract translation: 基于块的交织以将子载波块处理为由频率维度和时间维度定义的二维阵列。 对于阵列的每个符号，以对角线缠绕方式在阵列的每个频率索引处选择单元。 可以使用以递增频率索引，符号索引和由阵列的深度定义的模量计算的基于模的索引来遍历阵列。 可以如频率和时间指数所指示的，和/或如频率指数和/或时间指数的位反转表示所指示的。 块交织器可以被配置为在不影响频率的情况下进行时间交织，或者在时间和频率上进行交织。 可以用频率索引的位反转表示来执行频率交织。

公开(公告)号：US08908810B2

公开(公告)日：2014-12-09

申请号：US13728022

申请日：2012-12-27

Applicant: Intel Corporation

Inventor： Bernard Arambepola ,  Murat Badem ,  Parveen K. Shukla ,  Sahan Gamage ,  Thushara Hewavithana ,  Naor Goldman

IPC: H04L27/38 ,  H04L27/06 ,  H04L1/00

CPC classification number: H04L27/06 ,  H03M13/1515 ,  H03M13/451 ,  H03M13/453 ,  H04L1/0045 ,  H04L1/0047 ,  H04L1/0057 ,  H04L27/38

Abstract: A system and method are provided for implementing a soft Reed-Solomon (RS) decoding scheme, technique or algorithm to improve physical layer performance in cable modems and cable gateways. The algorithm is implemented in a forward error correction (FEC) module connected to a QAM demodulator. The RS decoding scheme is implemented without significantly complicating hardware or processing overhead. The soft Reed-Solomon (RS) decoding scheme extracts candidate RS symbols and their Log Likelihood Ratios (LLRs) from QAM symbols. The set of highest probable candidate blocks are then chosen and these are decoded using a variant of the Chase algorithm until a valid codeword is detected at the decoder output.

Abstract translation: 提供了一种用于实现软的里德 - 所罗门（RS）解码方案，技术或算法以改善电缆调制解调器和电缆网关中的物理层性能的系统和方法。 该算法在连接到QAM解调器的前向纠错（FEC）模块中实现。 实现RS解码方案，而不会使硬件或处理开销显着复杂化。 软里德 - 所罗门（RS）解码方案从QAM符号中提取候选RS符号及其对数似然比（LLR）。 然后选择最高可能候选块的集合，并且使用Chase算法的变体对这些候选块进行解码，直到在解码器输出处检测到有效码字。

公开(公告)号：US08817195B2

公开(公告)日：2014-08-26

申请号：US14047098

申请日：2013-10-07

Applicant: Intel Corporation

Inventor： Parveen K. Shukla ,  Bernard Arambepola ,  Thushara Hewavithana ,  Sahan Gamage

IPC: H04N5/52

CPC classification number: H04N5/455 ,  H04N5/52 ,  H04N21/4382 ,  H04N21/6112

Abstract: An embodiment of the present invention provides a method for digital television demodulation, comprising using adjacent-channel power dependent automatic gain control (AGC) for the digital television demodulation, wherein an AGC technique takes into account a total power as well as power of adjacent channels to control gain of a gain control amplifier.

Abstract translation: 本发明的一个实施例提供一种用于数字电视解调的方法，包括对数字电视解调使用相邻信道功率依赖自动增益控制（AGC），其中AGC技术考虑到相邻信道的总功率和功率 以控制增益控制放大器的增益。

公开(公告)号：US20140211889A1

公开(公告)日：2014-07-31

申请号：US13997691

申请日：2011-12-20

Applicant: INTEL CORPORATION

Inventor： Bernard Arambepola ,  Thushara Hewavithana ,  Parveen K. Shukla ,  Sahan S. Gamage

IPC: H04L27/26 ,  H04L1/00

CPC classification number: H04L27/2649 ,  H04L1/0036 ,  H04L27/265 ,  H04L27/2657 ,  H04L27/2675

Abstract: A system according to one embodiment includes a demodulator configured to receive an orthogonal frequency division multiplexed (OFDM) modulated signal comprising a current symbol and a sequence of previous symbols, each of the symbols comprising one or more pilot sub-carriers and one or more data sub-carriers; a phase angle computation circuit coupled to the demodulator, the phase angle computation circuit configured to compute a first mean, the first mean computed from the phase angle of one or more of the pilot sub-carriers of a predetermined number of the previous symbols; a predictive filter circuit coupled to the phase angle computation circuit, the predictive filter circuit configured to compute a second mean, the second mean estimating the phase angle of one or more sub-carriers of the current symbol, the estimation based on the first mean; and a phase noise cancelling circuit coupled to the predictive filter circuit, the phase noise cancelling circuit configured to correct the phase of one or more sub-carriers of the current symbol based on the second mean.

Abstract translation: 根据一个实施例的系统包括解调器，其被配置为接收包括当前符号和先前符号序列的正交频分复用（OFDM）调制信号，每个符号包括一个或多个导频子载波和一个或多个数据 子载体; 耦合到所述解调器的相位角计算电路，所述相位角计算电路被配置为计算第一平均值，所述第一平均值是从预定数量的先前符号的一个或多个导频子载波的相位角计算的第一平均值; 耦合到所述相位角计算电路的预测滤波器电路，所述预测滤波器电路被配置为计算第二平均值，所述第二平均值估计所述当前符号的一个或多个子载波的相位角，所述估计基于所述第一均值; 以及耦合到所述预测滤波器电路的相位噪声消除电路，所述相位噪声消除电路被配置为基于所述第二均值来校正所述当前符号的一个或多个子载波的相位。

公开(公告)号：US12078751B2

公开(公告)日：2024-09-03

申请号：US17392767

申请日：2021-08-03

Applicant: INTEL CORPORATION

Inventor： Ilia Yoffe ,  Ophir Shabtay ,  Chulong Chen ,  Thushara Hewavithana ,  Moshe Teplitsky ,  Lior Maor ,  Alon Cohen

IPC: G01S7/41 ,  G01S7/35 ,  G01S13/58 ,  G01S13/931 ,  G01S13/95

CPC classification number: G01S7/411 ,  G01S7/354 ,  G01S13/584 ,  G01S13/931 ,  G01S13/95

Abstract: Some demonstrative aspects include radar apparatuses, devices, systems and methods. In one example, an apparatus may include a plurality of Transmit (Tx) antennas to transmit radar Tx signals, a plurality of Receive (Rx) antennas to receive radar Rx signals based on the Tx signals, and a processor to generate radar information based on the radar Rx signals. The apparatus may be implemented, for example, as part of a radar device, for example, as part of a vehicle including the radar device. In other aspects, the apparatus may include any other additional or alternative elements and/or may be implemented as part of any other device.

公开(公告)号：US11789143B2

公开(公告)日：2023-10-17

申请号：US17133924

申请日：2020-12-24

Applicant: Intel Corporation

Inventor： Ophir Shabtay ,  Joseph Tabrikian ,  Thushara Hewavithana

IPC: G01S13/931 ,  G01S3/74 ,  G01S13/42 ,  G06F18/2431

CPC classification number: G01S13/931 ,  G01S3/74 ,  G01S13/426 ,  G06F18/2431

Abstract: For example, a radar processor may be configured to determine a first 1D AoA spectrum corresponding to a first dimension of an Azimuth-Elevation domain based on radar Rx data, to determine a second 1D AoA spectrum corresponding to a second dimension of the Azimuth-Elevation domain based on the radar Rx data, to detect one or more first object hypotheses in the first dimension based on the first 1D AoA spectrum, to detect one or more second object hypotheses in the second dimension based on the second 1D AoA spectrum, to determine a plurality of 2D object hypotheses corresponding to the Azimuth-Elevation domain based on the first object hypotheses and the second object hypotheses, and to generate 2D AoA information based on a 2D AoA spectrum analysis of the radar Rx data according to the plurality of 2D object hypotheses.