SOFTWARE DEFINED RADAR ARCHITECTURES
    3.
    发明申请

    公开(公告)号:US20190293755A1

    公开(公告)日:2019-09-26

    申请号:US16442100

    申请日:2019-06-14

    Abstract: Example software defined radar architectures are disclosed. Example chipsets disclosed herein to implement a software defined radar architecture include a digital processor chip including a first serial port and a second serial port. Disclosed example chipsets also include a transmitter chip to generate a plurality of transmit signals based on baseband radar waveform data to be obtained from the digital processor chip, the transmitter chip including a third serial port to communicate with the first serial port of the digital processor chip to obtain the baseband radar waveform data. Disclosed example chipsets further include a receiver chip to determine baseband received radar data from a plurality of radar signals, the receiver chip including a fourth serial port to communicate with the second serial port of the digital processor chip to provide the baseband received radar data to the digital processor chip.

    Beamforming techniques implementing the iterative adaptive approach (IAA)

    公开(公告)号:US11532883B2

    公开(公告)日:2022-12-20

    申请号:US16725396

    申请日:2019-12-23

    Abstract: Techniques are disclosed implementing two alternative approaches for adaptive beamforming for MIMO radar. The first of these includes a “reduced complexity” iterative adaptive approach (RC-IAA) algorithm, which uses two steps including a delay-and-sum beamforming step (DAS-BF) and an IAA step that is applied to the output generated by the DAS-BF step. A second technique is described that includes a “beam space” iterative adaptive approach (BS-IAA) algorithm, which uses three steps including a delay-and-sum beamforming step (DAS-BF), a region of interest (ROI) detection step that is applied to the output generated by the DAS-BF, and an IAA step that is applied to detected ROIs.

    METHODS AND APPARATUS TO IMPLEMENT COMPACT TIME-FREQUENCY DIVISION MULTIPLEXING FOR MIMO RADAR

    公开(公告)号:US20200233076A1

    公开(公告)日:2020-07-23

    申请号:US16455239

    申请日:2019-06-27

    Abstract: Methods and apparatus to implement compact time-frequency division multiplexing for MIMO radar are disclosed. An apparatus includes an antenna array controller to: transmit a first signal via a first transmitter of a radar antenna array, the first signal having a first duration and modulated across a first frequency range; and transmit a second signal via a second transmitter, the second signal having a second duration and modulated across a second frequency range, the first and second durations including an overlapping period of time, the first and second frequency ranges including an overlapping frequency range. The apparatus further includes a signal separation analyzer to: determine a first echo received at a receiver of the radar antenna array corresponds to the first signal; and determine a second echo received at the receiver corresponds to the second signal.

    MULTI-CHIP SYNCHRONIZATION WITH APPLICATIONS IN MULTIPLE-INPUT MULTIPLE-OUTPUT (MIMO) RADAR SYSTEMS

    公开(公告)号:US20190386665A1

    公开(公告)日:2019-12-19

    申请号:US16455247

    申请日:2019-06-27

    Abstract: An EC platform including a controller to control multiple integrated circuits (ICs) to synchronize an operational internal clock signal of an IC with a master clock signal. The controller generates commands for the IC to measure a phase difference or latency difference between an initial internal clock signal of the IC and an input clock signal to the IC from a parent IC. The controller further receives a difference signal from the IC to indicate the phase or latency difference. The IC includes a measurement circuit to measure the phase or latency difference, and to generate a difference signal to indicate the phase or latency difference. The IC further includes a synchronization clock generator to generate, based on the initial internal clock signal and the difference signal, an operational internal clock signal synchronized with the master clock signal. Other embodiments may also be described and claimed.

    Apparatus, system and method of radar data compression

    公开(公告)号:US11644534B2

    公开(公告)日:2023-05-09

    申请号:US16727234

    申请日:2019-12-26

    CPC classification number: G01S7/03 G01S7/038 G01S13/931 H04B7/0413

    Abstract: For example, a radar data compressor may include an input to receive input digital raw data comprising digital samples of received radar signals at a plurality of receive (Rx) antennas; a raw data compressor configured to compress the input digital raw data into compressed digital data, for example, by wiping off from the input digital raw data one or more wiped-off signals, e.g., based on a wipe-off criterion applied to the input digital raw data; and a compressor output to provide compressed data including the compressed digital data, and signal parameter information defining the one or more wiped-off signals.

    APPARATUS, SYSTEM AND METHOD OF RADAR ANTENNA CALIBRATION

    公开(公告)号:US20230095280A1

    公开(公告)日:2023-03-30

    申请号:US17801382

    申请日:2020-12-24

    Abstract: For example, a radar apparatus may include a mismatch calibrator configured to determine antenna mismatch calibration information to calibrate an antenna mismatch of a radar antenna array comprising a plurality of receive (Rx) antennas; and a processor to process radar Rx data, and to generate radar information based on the radar Rx data and the antenna mismatch calibration information, the radar Rx data is based on Rx radar signals received at the plurality of Rx antennas.

    Methods and apparatus to combine frames of overlapping scanning systems

    公开(公告)号:US11513204B2

    公开(公告)日:2022-11-29

    申请号:US16586431

    申请日:2019-09-27

    Abstract: Methods, apparatus, systems and articles of manufacture to combine frames of overlapping scanning systems are disclosed. An example apparatus includes a time delay controller to determine a first time value and a second time value, the first time value different from the second time value; a capture synchronizer to, in response to the first time value corresponding to a first time, capture a first frame from a first scanning system and, in response to the second time value corresponding to a second time, capture a second frame from a second scanning system; and a capture combiner to combine the first frame and the second frame into a third frame, the third frame including data from the first frame and data from the second frame.

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