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公开(公告)号：US10134455B2
公开(公告)日：2018-11-20
申请号：US15815691
申请日：2017-11-16
Applicant: International Business Machines Corporation
Inventor： John S. Bialas, Jr. , David D. Cadigan , Stephen P. Glancy , Warren E. Maule , Gary A. Van Huben
IPC: G11C7/22 , G11C29/50 , G11C11/4076 , G11C11/401 , G11C7/10 , G11C11/4093 , G11C11/409
Abstract: A system and method for efficient data eye training reduces the time and resources spent calibrating one or more memory devices. A temporal calibration mechanism reduces the time and resources for calibration by reducing the number tests needed to sufficiently determine the boundaries of the data eye of the memory device. For one or more values of the voltage reference, the temporal calibration mechanism performs a minimal number of tests to find the edges of the data eye for the hold and setup times.
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公开(公告)号：US20180075887A1
公开(公告)日：2018-03-15
申请号：US15815691
申请日：2017-11-16
Applicant: International Business Machines Corporation
Inventor： John S. Bialas, JR. , David D. Cadigan , Stephen P. Glancy , Warren E. Maule , Gary A. Van Huben
CPC classification number: G11C7/22 , G11C7/10 , G11C7/1066 , G11C7/1093 , G11C11/401 , G11C11/4076 , G11C11/409 , G11C11/4093 , G11C29/50012 , G11C2029/5004 , G11C2207/2254
Abstract: A system and method for efficient data eye training reduces the time and resources spent calibrating one or more memory devices. A temporal calibration mechanism reduces the time and resources for calibration by reducing the number tests needed to sufficiently determine the boundaries of the data eye of the memory device. For one or more values of the voltage reference, the temporal calibration mechanism performs a minimal number of tests to find the edges of the data eye for the hold and setup times.
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公开(公告)号：US20180074109A1
公开(公告)日：2018-03-15
申请号：US15817402
申请日：2017-11-20
Applicant: International Business Machines Corporation
Inventor： David D. Cadigan , William V. Huott , Adam J. McPadden , Anuwat Saetow , Gary A. Tressler
CPC classification number: G01R31/025 , G01R31/024 , G01R31/2851 , G01R31/2856 , G01R31/2858 , G01R31/3008
Abstract: A method detects electromigration in an electronic device. An integrated circuit, which is within an electronic device, is quiescented. An isolation power switch applies a test voltage from a field power source to a target voltage rail in the integrated circuit. An isolation power switch isolates the target voltage rail from the field power source. A voltage sensor coupled to the target voltage rail measures a field voltage decay rate for the target voltage rail. A voltage record comparator logic within the integrated circuit compares the field voltage decay rate to an initial voltage decay rate for the target voltage rail. In response to a difference between the field voltage decay rate and the initial voltage decay rate for the target voltage rail exceeding a predetermined limit, a signal is sent to an alarm associated with the electronic device.
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公开(公告)号：US09857416B2
公开(公告)日：2018-01-02
申请号：US15054464
申请日：2016-02-26
Applicant: International Business Machines Corporation
Inventor： David D. Cadigan , William V. Huott , Adam J. McPadden , Anuwat Saetow , Gary A. Tressler
CPC classification number: G01R31/025 , G01R31/024 , G01R31/2851 , G01R31/2856 , G01R31/2858 , G01R31/3008
Abstract: A method detects electromigration in a field replaceable unit. An integrated circuit, which is within a field replaceable unit (FRU) in an electronic device, is quiescented. An isolation power switch applies a test voltage from a field power source to a target voltage rail in the integrated circuit. An isolation power switch isolates the target voltage rail from the field power source. A voltage sensor coupled to the target voltage rail measures a field voltage decay rate for the target voltage rail. A voltage record comparator logic within the integrated circuit compares the field voltage decay rate to an initial voltage decay rate for the target voltage rail. In response to a difference between the field voltage decay rate and the initial voltage decay rate for the target voltage rail exceeding a predetermined limit, a signal is sent to an output device.
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公开(公告)号：US20170293514A1
公开(公告)日：2017-10-12
申请号：US15096344
申请日：2016-04-12
Applicant: International Business Machines Corporation
Inventor： David D. Cadigan , Charles A. Kilmer , Anil B. Lingambudi , Adam J. McPadden , Anuwat Saetow
CPC classification number: G06F11/076 , G06F11/0727 , G06F11/0793 , G06F11/1048 , G06F11/1076
Abstract: An aspect includes identifying a repaired memory array element in a memory array, and identifying memory array elements in the memory array that are adjacent to the repaired memory array element. A group that includes the repaired and adjacent memory array elements is formed and monitored for error conditions. It is determined whether a number of the error conditions exceeds a threshold. A repair action is performed to the memory array based on determining that the number of error conditions exceeds the threshold.
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Patent Agency Ranking
公开(公告)号：US09753076B2
公开(公告)日：2017-09-05
申请号：US15008802
申请日：2016-01-28
Applicant: International Business Machines Corporation
Inventor： David D. Cadigan , William V. Huott , Adam J. McPadden , Anuwat Saetow , Gary A. Tressler
CPC classification number: G01R31/025 , G01R31/024 , G01R31/2851 , G01R31/2856 , G01R31/2858 , G01R31/3008
Abstract: An integrated circuit is configured to detect current leakage that results from electromigration in the integrated circuit. An isolation power switch selectively connects a target voltage rail in the integrated circuit to a power source. A voltage memory stores a record of an initial voltage decay rate for the target voltage rail while isolated from a manufacturer's power source. A voltage record comparator logic compares the initial voltage decay rate to a field voltage decay rate for the target voltage rail when isolated from a field power source. An output device indicates that a difference between the initial voltage decay rate and the field voltage decay rate for the target voltage rail exceeds a predefined limit, where the difference is a result of current leakage caused by electromigration in the integrated circuit.
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公开(公告)号：US20170219648A1
公开(公告)日：2017-08-03
申请号：US15054464
申请日：2016-02-26
Applicant: International Business Machines Corporation
Inventor： David D. Cadigan , William V. Huott , Adam J. McPadden , Anuwat Saetow , Gary A. Tressler
IPC: G01R31/28
CPC classification number: G01R31/025 , G01R31/024 , G01R31/2851 , G01R31/2856 , G01R31/2858 , G01R31/3008
Abstract: A method detects electromigration in a field replaceable unit. An integrated circuit, which is within a field replaceable unit (FRU) in an electronic device, is quiescented. An isolation power switch applies a test voltage from a field power source to a target voltage rail in the integrated circuit. An isolation power switch isolates the target voltage rail from the field power source. A voltage sensor coupled to the target voltage rail measures a field voltage decay rate for the target voltage rail. A voltage record comparator logic within the integrated circuit compares the field voltage decay rate to an initial voltage decay rate for the target voltage rail. In response to a difference between the field voltage decay rate and the initial voltage decay rate for the target voltage rail exceeding a predetermined limit, a signal is sent to an output device.
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公开(公告)号：US20210141550A1
公开(公告)日：2021-05-13
申请号：US16677740
申请日：2019-11-08
Applicant: International Business Machines Corporation
Inventor： Krishna Thangaraj , David D. Cadigan , Kevin M. McIlvain
Abstract: Disclosed is a computer implemented method to mark data as persistent using spare bits. The method includes receiving, by a memory system, a set of data, wherein the set of data includes a subset of meta-bits, and the set of data is received as a plurality of transfers, and wherein the memory system includes a first rank and a second rank. The method also includes decoding, by a decoder, the subset of meta-bits, wherein the subset of meta-bits are configured to indicate the set of data is important. The method further includes storing, based on the decoding, the set of data in a persistent storage medium.
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公开(公告)号：US10684968B2
公开(公告)日：2020-06-16
申请号：US15623960
申请日：2017-06-15
Applicant: International Business Machines Corporation
Inventor： David D. Cadigan , Thomas J. Dewkett , Glenn D. Gilda , Patrick J. Meaney , Craig R. Walters
IPC: G06F13/16
Abstract: A processor implemented method for spreading data traffic across memory controllers with respect to conditions is provided. The processor implemented method includes determining whether the memory controllers are balanced. The processor implemented method includes executing a conditional spreading with respect to the conditions when the memory controllers are determined as unbalanced. The processor implemented method includes executing an equal spreading when the memory controllers are determined as balanced.
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公开(公告)号：US10324879B2
公开(公告)日：2019-06-18
申请号：US15278665
申请日：2016-09-28
Applicant: International Business Machines Corporation
Inventor： David D. Cadigan , Samuel R. Connor , Michael A. Cracraft , William V. Huott , Adam J. McPadden , Anuwat Saetow , Gary A. Tressler
IPC: G06F13/40 , G06F13/42 , G06F1/3296
Abstract: An apparatus and method may detect and reduce noise on data busses by adjusting the phase of the input/output (I/O) signals in a controlled, predictable manner. The control may allow a maximum data rate to be achieved. In one embodiment, an algorithm used to determine phase change data may be handled by a feedback loop and may be dynamically adjusted. The system may detect noise on rails and critical signals for logging in call home data. The system may maintain a database of settings as a function of a workload. The system may be used in the field as the workload changes to determine that a signal has reached a first threshold. In response to determining that the signal has reached the first threshold, an alert is initiated. A system may determine that the signal has reached a second threshold. In response to determining that the signal has reached the second threshold, the signal may be coupled to logic circuitry.
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