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公开(公告)号：US20230056118A1
公开(公告)日：2023-02-23
申请号：US17893004
申请日：2022-08-22
申请人： Intel Corporation
IPC分类号： H03K19/1776 , G11C7/10 , H01L25/065 , G11C5/02
摘要： An integrated circuit device may include a programmable fabric die having programmable logic fabric and configuration memory that may configure the programmable logic fabric. The integrated circuit device may also include a base die that may provide fabric support circuitry, including memory and/or communication interfaces. The first die and the second die may be coupled using a multi-purpose interface that may allow communication between the first die and the second die. The multi-purpose interface may allow concurrent access to the base die by the programmable logic fabric and the configuration memory by using multiple channels over the multi-purpose interface.
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22.发明授权公开(公告)号：US11520388B2
公开(公告)日：2022-12-06
申请号：US15855457
申请日：2017-12-27
申请人： Intel Corporation
IPC分类号： G05B15/02 , G06F1/20 , H03K19/0175 , H03K19/003 , H03K19/00 , G06F1/3287 , H01L23/538 , G06F1/3296 , H01L25/18 , H01L23/367 , H01L23/00 , H01L23/34
摘要： An integrated circuit assembly may include an integrated circuit having a plurality of programmable logic sectors and an interposer circuit positioned adjacent to the integrated circuit. The interposer circuit may include at least one voltage regulator that distributes a voltage to at least one of the plurality of programmable logic sectors and at least one thermal sensor that measures a temperature of the at least one of the plurality of programmable logic sectors.
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公开(公告)号：US11296706B2
公开(公告)日：2022-04-05
申请号：US16020748
申请日：2018-06-27
申请人： Intel Corporation
IPC分类号： H03K19/17772 , H03K19/1776 , H03K19/17768 , H03K19/17796 , H03K19/17758
摘要： An integrated circuit device may include programmable logic fabric disposed on a first integrated circuit die, such that the programmable logic fabric may include a first region of programmable logic fabric and a second region of programmable logic fabric. The first region of programmable logic fabric is configured to be programmed with a circuit design that operates on a first set of data. The integrated circuit may also include network on chip (NOC) circuitry disposed on a second integrated circuit die, such that the NOC circuitry is configured to communicate data between the first integrated circuit die and the second integrated circuit die.
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公开(公告)号：US20220078136A1
公开(公告)日：2022-03-10
申请号：US17528005
申请日：2021-11-16
申请人： Intel Corporation
IPC分类号： H04L12/933 , H01L25/065
摘要： This disclosure relates to integrated circuit devices that may include a network processor in a data processing die and an on-package memory in a base die. The data processing die may implement one or more network functionalities that may exchange data with low-latency memory, high capacity in the base die. The data processing die may be programmable fabric, which may be dynamically reconfigured during operation.
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25.发明授权公开(公告)号：US11257526B2
公开(公告)日：2022-02-22
申请号：US15868304
申请日：2018-01-11
申请人： Intel Corporation
IPC分类号： G11C5/02 , H03K19/1776 , G11C5/04 , G11C5/06
摘要： An integrated circuit device may include programmable logic fabric on a first integrated circuit die and sector-aligned memory on a second integrated circuit die to enable large amounts of data to be rapidly processed by a sector of programmable logic of the programmable logic device. The programmable logic fabric may include a first and second sectors. The first sector may be programmed with a circuit design that operates on a first set of data. The sector-aligned memory may include a first sector of sector-aligned memory directly accessible by the first sector of programmable logic fabric and a second sector of sector-aligned memory directly accessible by the second sector of programmable logic fabric. The first sector of sector-aligned memory may store the first set of data.
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公开(公告)号：US11190460B2
公开(公告)日：2021-11-30
申请号：US16369889
申请日：2019-03-29
申请人： Intel Corporation
IPC分类号： H04L12/933 , H01L25/065 , H01L23/538
摘要： This disclosure relates to integrated circuit devices that may include a network processor in a data processing die and an on-package memory in a base die. The data processing die may implement one or more network functionalities that may exchange data with low-latency memory, high capacity in the base die. The data processing die may be programmable fabric, which may be dynamically reconfigured during operation.
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公开(公告)号：US20190042251A1
公开(公告)日：2019-02-07
申请号：US16146586
申请日：2018-09-28
申请人： Intel Corporation
摘要： An integrated circuit device may include programmable logic circuitry on a first integrated circuit die and memory that includes compute-in-memory circuitry on a second die. The programmable logic circuitry may be programmed with a circuit design that operates on a first set of data. The compute-in-memory circuitry of the memory may perform an arithmetic operation using the first set of data from the programmable logic circuitry and a second set of data stored in the memory.
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公开(公告)号：US20240205167A1
公开(公告)日：2024-06-20
申请号：US18587744
申请日：2024-02-26
申请人： Intel Corporation
IPC分类号： H04L49/109 , H01L23/538 , H01L25/065 , H04L49/15
CPC分类号： H04L49/109 , H01L25/0652 , H04L49/15 , H01L23/5386 , H01L2225/06513 , H01L2225/06517
摘要： This disclosure relates to integrated circuit devices that may include a network processor in a data processing die and an on-package memory in a base die. The data processing die may implement one or more network functionalities that may exchange data with low-latency memory, high capacity in the base die. The data processing die may be programmable fabric, which may be dynamically reconfigured during operation.
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公开(公告)号：US20230208783A1
公开(公告)日：2023-06-29
申请号：US18177417
申请日：2023-03-02
申请人： Intel Corporation
IPC分类号： H04L49/109 , H01L25/065 , H04L49/15
CPC分类号： H04L49/109 , H01L25/0652 , H04L49/15 , H01L2225/06517 , H01L23/5386
摘要： This disclosure relates to integrated circuit devices that may include a network processor in a data processing die and an on-package memory in a base die. The data processing die may implement one or more network functionalities that may exchange data with low-latency memory, high capacity in the base die. The data processing die may be programmable fabric, which may be dynamically reconfigured during operation.
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公开(公告)号：US11632112B2
公开(公告)日：2023-04-18
申请号：US15855419
申请日：2017-12-27
申请人： Intel Corporation
IPC分类号： G06F7/38 , H03K19/173 , H03K19/0175 , G06F3/06 , G11C11/417 , H01L25/18 , H01L27/02 , H01L23/48 , H01L23/538 , H01L23/00 , H01L25/00 , H01L23/367 , G11C7/10 , H03K19/17796 , G11C5/04 , G06F30/34
摘要： An integrated circuit device having separate dies for programmable logic fabric and circuitry to operate the programmable logic fabric are provided. A first integrated circuit die may include field programmable gate array fabric. A second integrated circuit die may be coupled to the first integrated circuit die. The second integrated circuit die may include fabric support circuitry that operates the field programmable gate array fabric of the first integrated circuit die.
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