公开(公告)号：US11651952B2

公开(公告)日：2023-05-16

申请号：US17168393

申请日：2021-02-05

Applicant: Micron Technology, Inc.

Inventor： Michael T. Andreas ,  Jerome A. Imonigie ,  Prashant Raghu ,  Sanjeev Sapra ,  Ian K. McDaniel

IPC: H01L21/02 ,  B81C1/00

CPC classification number: H01L21/02057 ,  B81C1/00849 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/02334 ,  B81C2201/0108

Abstract: In an example, a wet cleaning process is performed to clean a structure having features and openings between the features while preventing drying of the structure. After performing the wet cleaning process, a polymer solution is deposited in the openings while continuing to prevent any drying of the structure. A sacrificial polymer material is formed in the openings from the polymer solution. The structure may be used in semiconductor devices, such as integrated circuits, memory devices, MEMS, among others.

公开(公告)号：US09653307B1

公开(公告)日：2017-05-16

申请号：US15210249

申请日：2016-07-14

Applicant: Micron Technology, Inc.

Inventor： Jerome A. Imonigie ,  Ian C. Laboriante ,  Michael T. Andreas ,  Sanjeev Sapra ,  Prashant Raghu

IPC: H01L21/306 ,  C09D5/16 ,  C09D7/12

CPC classification number: H01L21/306 ,  H01L21/02057 ,  H01L21/0206 ,  H01L21/02068 ,  H01L21/3105 ,  H01L21/321

Abstract: A surface modification composition comprising a silylation agent comprising a silyl acetamide, a silylation catalyst comprising a perfluoro acid anhydride, an amine-based complexing agent, and an organic solvent. Methods of modifying a silicon-based material and methods of forming high aspect ratio structures on a substrate are also disclosed.

公开(公告)号：US09614153B2

公开(公告)日：2017-04-04

申请号：US14607329

申请日：2015-01-28

Applicant: Micron Technology, Inc.

Inventor： Jerome A. Imonigie ,  Prashant Raghu ,  Theodore M. Taylor ,  Scott E. Sills

IPC: H01L45/00

CPC classification number: H01L45/1658 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1641

Abstract: Methods of selectively forming a metal-doped chalcogenide material comprise exposing a chalcogenide material to a transition metal solution, and incorporating transition metal of the transition solution into the chalcogenide material without substantially incorporating the transition metal into an adjacent material. The chalcogenide material is not silver selenide. Another method comprises forming a chalcogenide material adjacent to and in contact with an insulative material, exposing the chalcogenide material and the insulative material to a transition metal solution, and diffusing transition metal of the transition metal solution into the chalcogenide material while substantially no transition metal diffuses into the insulative material. A method of doping a chalcogenide material of a memory cell with at least one transition metal without using an etch or chemical mechanical planarization process to remove the transition metal from an insulative material of the memory cell is also disclosed, wherein the chalcogenide material is not silver selenide.

公开(公告)号：US09236427B2

公开(公告)日：2016-01-12

申请号：US14501423

申请日：2014-09-30

Applicant: Micron Technology, Inc.

Inventor： Joseph Neil Greeley ,  Duane M. Goodner ,  Vishwanath Bhat ,  Vassil N. Antonov ,  Prashant Raghu

IPC: H01L27/108 ,  H01L29/94 ,  H01L49/02 ,  B82Y30/00

CPC classification number: H01L28/75 ,  B82Y30/00 ,  H01L27/10808 ,  H01L27/10852 ,  H01L28/65 ,  H01L28/90 ,  Y10S977/932 ,  Y10T428/265

Abstract: Some embodiments include a method of forming a capacitor. An opening is formed through a silicon-containing mass to a base, and sidewalls of the opening are lined with protective material. A first capacitor electrode is formed within the opening and has sidewalls along the protective material. At least some of the silicon-containing mass is removed with an etch. The protective material protects the first capacitor electrode from being removed by the etch. A second capacitor electrode is formed along the sidewalls of the first capacitor electrode, and is spaced from the first capacitor electrode by capacitor dielectric. Some embodiments include multi-material structures having one or more of aluminum nitride, molybdenum nitride, niobium nitride, niobium oxide, silicon dioxide, tantalum nitride and tantalum oxide. Some embodiments include semiconductor constructions.

Abstract translation: 一些实施例包括形成电容器的方法。 通过含硅物质向基底形成开口，并且开口的侧壁衬有保护材料。 第一电容器电极形成在开口内并具有保护材料的侧壁。 用蚀刻去除至少一些含硅物质。 保护材料保护第一电容器电极不被蚀刻除去。 沿着第一电容器电极的侧壁形成第二电容器电极，并且通过电容器电介质与第一电容器电极间隔开。 一些实施例包括具有氮化铝，氮化钼，氮化铌，氧化铌，二氧化硅，氮化钽和氧化钽中的一种或多种的多材料结构。 一些实施例包括半导体结构。

公开(公告)号：US20150203754A1

公开(公告)日：2015-07-23

申请号：US14672870

申请日：2015-03-30

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Jerome A. Imonigie ,  Prashant Raghu

IPC: C09K13/08

CPC classification number: C09K13/08 ,  C09K13/00 ,  C09K13/04 ,  C09K13/06 ,  H01L21/28273 ,  H01L21/30604 ,  H01L21/31111 ,  H01L21/32134 ,  H01L27/11556

Abstract: Compositions for etching polysilicon including aqueous compositions containing nitric acid and ammonium fluoride.

Abstract translation: 用于蚀刻多晶硅的组合物，包括含有硝酸和氟化铵的含水组合物。

公开(公告)号：US20130302995A1

公开(公告)日：2013-11-14

申请号：US13948043

申请日：2013-07-22

Applicant: Micron Technology, Inc.

Inventor： Janos Fucsko ,  Niraj B. Rana ,  Sandra Tagg ,  Robert J. Hanson ,  Gundu M. Sabde ,  Donald L. Yates ,  Patrick M. Flynn ,  Prashant Raghu ,  Kyle Grant

IPC: H01L21/306

CPC classification number: H01L21/30604 ,  H01L21/02052 ,  H01L21/31111

Abstract: Some embodiments include methods of treating semiconductor substrates. The substrates may be exposed to one or more conditions that vary continuously. The conditions may include temperature gradients, concentration gradients of one or more compositions that quench etchant, pH gradients to assist in removing particles, and/or concentration gradients of one or more compositions that assist in removing particles. The continuously varying conditions may be imparted by placing the semiconductor substrates in a bath of flowing rinsing solution, with the bath having at least two feed lines that provide the rinsing solution therein. One of the feed lines may be at a first condition, and the other may be at a second condition that is different from the first condition. The relative amount of rinsing solution provided to the bath by each feed line may be varied to continuously vary the condition within the bath.

Abstract translation: 一些实施方案包括处理半导体衬底的方法。 衬底可以暴露于连续变化的一个或多个条件。 条件可以包括温度梯度，一种或多种淬灭蚀刻剂的组合物的浓度梯度，有助于除去颗粒的pH梯度和/或一种或多种有助于除去颗粒的组合物的浓度梯度。 可以通过将半导体衬底放置在流动的冲洗溶液浴中来赋予连续变化的条件，浴中具有至少两条在其中提供漂洗溶液的进料管线。 供给管线中的一个可以处于第一状态，另一个可以处于与第一条件不同的第二条件。 可以改变通过每个进料管提供给浴的冲洗溶液的相对量，以连续地改变浴内的状态。