公开(公告)号：US12256546B2

公开(公告)日：2025-03-18

申请号：US18386346

申请日：2023-11-02

Applicant: Micron Technology, Inc.

Inventor： Yiping Wang ,  Andrew Li ,  Haoyu Li ,  Matthew J. King ,  Wei Yeeng Ng ,  Yongjun Jeff Hu

IPC: H10B43/00 ,  H01L21/283 ,  H01L21/306 ,  H10B41/27 ,  H10B41/35 ,  H10B43/27 ,  H10B43/35

Abstract: Some embodiments include an integrated assembly having a first structure containing semiconductor material, and having a second structure contacting the first structure. The first structure has a composition along an interface with the second structure. The composition includes additive to a concentration within a range of from about 1018 atoms/cm3 to about 1021 atoms/cm3. The additive includes one or more of carbon, oxygen, nitrogen and sulfur. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US20240064982A1

公开(公告)日：2024-02-22

申请号：US18386346

申请日：2023-11-02

Applicant: Micron Technology, Inc.

Inventor： Yiping Wang ,  Andrew Li ,  Haoyu Li ,  Matthew J. King ,  Wei Yeeng Ng ,  Yongjun Jeff Hu

IPC: H10B43/27 ,  H01L21/283 ,  H01L21/306 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

CPC classification number: H10B43/27 ,  H01L21/283 ,  H01L21/30608 ,  H10B41/27 ,  H10B41/35 ,  H10B43/35

Abstract: Some embodiments include an integrated assembly having a first structure containing semiconductor material, and having a second structure contacting the first structure. The first structure has a composition along an interface with the second structure. The composition includes additive to a concentration within a range of from about 1018 atoms/cm3 to about 1021 atoms/cm3. The additive includes one or more of carbon, oxygen, nitrogen and sulfur. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US20230057852A1

公开(公告)日：2023-02-23

申请号：US17408813

申请日：2021-08-23

Applicant: Micron Technology, Inc.

Inventor： Collin Howder ,  M. Jared Barclay ,  Bhavesh Bhartia ,  Chet E. Carter ,  John D. Hopkins ,  Andrew Li ,  Haoyu Li ,  Alyssa N. Scarbrough ,  Grady S. Waldo

IPC: H01L27/11582 ,  H01L27/11556

Abstract: Integrated circuitry comprising a memory array comprises strings of memory cells comprising laterally-spaced memory blocks individually comprising a first vertical stack comprising alternating insulative tiers and conductive tiers above a conductor tier. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The channel-material strings directly electrically couple with conductor material of the conductor tier. The conductive tiers individually comprise a horizontally-elongated conductive line. A second vertical stack is aside the first vertical stack. The second vertical stack comprises an upper portion and a lower portion. The upper portion comprises vertically-alternating first insulating tiers and second insulating tiers that are of different insulative compositions relative one another. The lower portion comprises a horizontal line above the conductor tier that runs parallel with the laterally-spaced memory blocks in the first vertical stack. Other embodiments, including method, are disclosed.

公开(公告)号：US11527548B2

公开(公告)日：2022-12-13

申请号：US16216088

申请日：2018-12-11

Applicant: Micron Technology, Inc.

Inventor： Haoyu Li ,  Everett A. McTeer ,  Christopher W. Petz ,  Yongjun J. Hu

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/1157 ,  H01L21/311 ,  H01L27/11524 ,  H01L21/28

Abstract: A semiconductor device comprises a semiconductor material extending through a stack of alternating levels of a conductive material and an insulative material, and a material comprising cerium oxide and at least another oxide adjacent to the semiconductor material. Related electronic systems and methods are also disclosed.

公开(公告)号：US20190355711A1

公开(公告)日：2019-11-21

申请号：US16398433

申请日：2019-04-30

Applicant: Micron Technology, Inc.

Inventor： Daniel Billingsley ,  Everett A. McTeer ,  Christopher W. Petz ,  Haoyu Li ,  John Mark Meldrim ,  Yongjun Jeff Hu

IPC: H01L27/02 ,  G11C11/34 ,  H01L21/82 ,  H01L23/532 ,  H01L27/12 ,  G11C5/06

Abstract: An integrated assembly includes an insulative mass with a first region adjacent to a second region. The first region has a greater amount of one or more inert interstitial elements incorporated therein than does the second region. Some embodiments include an integrated assembly which has vertically-extending channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure includes doped semiconductor material in direct contact with bottom regions of the channel material pillars. An insulative mass is along the bottom regions of the channel material pillars. The insulative mass has an upper region over a lower region. The lower region has a greater amount of one or more inert interstitial elements incorporated therein than does the upper region. Some embodiments include methods of forming integrated assemblies.

公开(公告)号：US20190304996A1

公开(公告)日：2019-10-03

申请号：US16431527

申请日：2019-06-04

Applicant: Micron Technology, Inc.

Inventor： David Ross Economy ,  John Mark Meldrim ,  Haoyu Li ,  Yongjun Jeff Hu ,  Christopher W. Petz ,  Daniel Billingsley ,  Everett A. McTeer

IPC: H01L27/11582 ,  H01L21/768 ,  H01L27/11565 ,  H01L27/11556 ,  H01L27/11519 ,  H01L21/311

Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.

公开(公告)号：US20190198519A1

公开(公告)日：2019-06-27

申请号：US15852989

申请日：2017-12-22

Applicant: Micron Technology, Inc.

Inventor： David Ross Economy ,  John Mark Meldrim ,  Haoyu Li ,  Yongjun Jeff Hu ,  Christopher W. Petz ,  Daniel Billingsley ,  Everett A. McTeer

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L21/768 ,  H01L21/311 ,  H01L27/11565 ,  H01L27/11519

CPC classification number: H01L27/11582 ,  H01L21/31144 ,  H01L21/76831 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565

Abstract: Some embodiments include an assembly which has channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure has doped semiconductor material in direct contact with bottom regions of the channel material pillars. One or more of magnesium, scandium, yttrium and lanthanide elements is along the bottom regions of the channel material pillars. Some embodiments include methods of forming assemblies. A structure is formed, and a mass is formed against an upper surface of the structure. Plugs are formed within openings in the mass. The plugs comprise a second material over a first material. The first material includes one or more of magnesium, scandium, yttrium and lanthanide elements. Openings are formed to terminate on the first material, and are then extended through the first material. Channel material pillars are formed within the openings.