公开(公告)号：US20180342437A1

公开(公告)日：2018-11-29

申请号：US16055183

申请日：2018-08-06

Applicant: Novatek Microelectronics Corp.

Inventor： Wen-Ching Huang ,  Tai-Hung Lin

IPC: H01L23/367 ,  H01L23/373 ,  H01L23/495 ,  H01L21/48 ,  H01L23/00

Abstract: A chip on film package includes a base film, a chip and a heat-dissipation structure. The base film includes a first surface and a second surface opposite to the first surface. The chip is disposed on the first surface and has a chip length along a first axis of the chip and a chip width along a second axis of the chip perpendicular to the first axis. The heat-dissipation structure includes a covering portion. The covering portion at least partially covers the chip, exposes a side surface of the chip, and has a first length along the first axis and a second length along the second axis being longer than the chip width of the chip. The side surface connects a top surface and a bottom surface of the chip. A heat-dissipation structure is also provided.

公开(公告)号：US20180331049A1

公开(公告)日：2018-11-15

申请号：US15705264

申请日：2017-09-15

Applicant: Novatek Microelectronics Corp.

Inventor： Wen-Ching Huang ,  Tai-Hung Lin

IPC: H01L23/60 ,  H01L23/498

CPC classification number: H01L23/60 ,  H01L23/49827

Abstract: A chip on film package includes a base film, a patterned circuit layer, a solder resist layer, a chip and a first conductive film. The base film includes a first surface and a mounting region located on the first surface. The patterned circuit layer is disposed on the first surface. The solder resist layer partially covers the patterned circuit layer. The chip is disposed in the mounting region and electrically connected to the patterned circuit layer. The first conductive film covers at least a part of the first solder resist layer and an opening exposing at least a part of the patterned circuit layer, wherein the first conductive film is configured to shield electromagnetic interference (EMI) emanating by the chip and is electrically connected to the patterned circuit layer.

公开(公告)号：US09627337B2

公开(公告)日：2017-04-18

申请号：US14740286

申请日：2015-06-16

Applicant: Novatek Microelectronics Corp.

Inventor： Jung-Fu Hsu ,  Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L23/60 ,  H01L23/00 ,  H01L27/02

CPC classification number: H01L24/06 ,  H01L23/50 ,  H01L23/60 ,  H01L24/05 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L27/0248 ,  H01L27/0292 ,  H01L27/0296 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05088 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05624 ,  H01L2224/0612 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48132 ,  H01L2224/48464 ,  H01L2224/48465 ,  H01L2224/49113 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/30205 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

Abstract: An integrated circuit device including a semiconductor substrate, a first bonding pad structure, a second bonding pad structure, and an internal bonding wire is provided. The first bonding pad structure is disposed on a surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The second bonding pad structure is disposed on the surface of the semiconductor substrate and exposed outside of the semiconductor substrate. The first bonding pad structure is electrically coupled to the second bonding pad structure via the internal bonding wire. The integrated circuit device having a better electrical performance is provided by eliminating internal resistance drop in power supply trails or ground trails, and improving signal integrity of the integrated circuit device.

公开(公告)号：US09236360B2

公开(公告)日：2016-01-12

申请号：US13650873

申请日：2012-10-12

Applicant: NOVATEK MICROELECTRONICS CORP.

Inventor： Tai-Hung Lin

IPC: H01L23/48 ,  H01L23/00 ,  H01L23/544 ,  H01L21/683

CPC classification number: H01L24/13 ,  H01L21/6836 ,  H01L23/544 ,  H01L24/11 ,  H01L24/29 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L2224/1184 ,  H01L2224/11845 ,  H01L2224/13083 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/27416 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/293 ,  H01L2224/29499 ,  H01L2224/73104 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81201 ,  H01L2224/81424 ,  H01L2224/81903 ,  H01L2224/83191 ,  H01L2224/83192 ,  H01L2224/83193 ,  H01L2224/8385 ,  H01L2224/83851 ,  H01L2224/9211 ,  H01L2224/94 ,  H01L2924/15788 ,  H01L2924/00012 ,  H01L2924/00014 ,  H01L2924/0665 ,  H01L2224/11 ,  H01L2224/27 ,  H01L2924/00

Abstract: An IC chip package and a chip-on-glass structure using the same are provided. The IC chip package includes an IC chip having a circuit surface, and plural copper (Cu) bumps formed on the circuit surface. Moreover, a non-conductive film (NCF) could be formed on the circuit surface to cover the Cu bumps. The chip-on-glass structure includes a glass substrate, plural electrodes such as aluminum (Al) electrodes formed on the glass substrate, and a conductive film formed on the electrodes. The conductive film contains a number of conductive particles. When the IC chip package is coupled to the glass substrate, the Cu bumps can be coupled to the corresponding electrodes via conductive particles.

Abstract translation: 提供一种IC芯片封装和使用其的芯片上玻璃结构。 IC芯片封装包括具有电路表面的IC芯片和形成在电路表面上的多个铜（Cu）凸块。 此外，可以在电路表面上形成非导电膜（NCF）以覆盖铜凸块。 晶片玻璃结构包括玻璃基板，形成在玻璃基板上的诸如铝（Al）电极的多个电极以及形成在电极上的导电膜。 导电膜含有多个导电颗粒。 当IC芯片封装耦合到玻璃基板时，Cu凸块可以经由导电颗粒耦合到相应的电极。

公开(公告)号：US20140048935A1

公开(公告)日：2014-02-20

申请号：US14062899

申请日：2013-10-25

Applicant: Novatek Microelectronics Corp.

Inventor： Tai-Hung Lin ,  Chang-Tien Tsai

IPC: H01L23/60 ,  H01L23/49

CPC classification number: H01L24/05 ,  H01L23/49 ,  H01L23/60 ,  H01L24/06 ,  H01L24/42 ,  H01L24/45 ,  H01L24/48 ,  H01L27/0248 ,  H01L2224/02166 ,  H01L2224/04042 ,  H01L2224/05095 ,  H01L2224/05124 ,  H01L2224/05147 ,  H01L2224/05553 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/45015 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48465 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/2064 ,  H01L2924/00 ,  H01L2924/00015 ,  H01L2224/43

Abstract: An integrated circuit device including a substrate, a first internal bonding pad, a second internal bonding pad, an external bonding pad and a bonding wire is provided. A first circuit and a second circuit are embedded in the substrate. The first internal bonding pad is disposed on a surface of the substrate and electrically coupled to the first circuit. The second internal bonding pad is disposed on the surface of the substrate and electrically coupled to the second circuit. The second internal bonding pad is electrically coupled to the first internal bonding pad via the bonding wire. The external bonding pad is electrically coupled to the first internal bonding pad.

Abstract translation: 提供一种集成电路装置，包括基板，第一内部接合焊盘，第二内部焊盘，外部焊盘和接合线。 第一电路和第二电路嵌入在基板中。 第一内部接合焊盘设置在基板的表面上并电耦合到第一电路。 第二内部接合焊盘设置在基板的表面上并电耦合到第二电路。 第二内部接合焊盘经由接合线电耦合到第一内部接合焊盘。 外部接合焊盘电耦合到第一内部接合焊盘。