公开(公告)号：US20220393479A1

公开(公告)日：2022-12-08

申请号：US17819608

申请日：2022-08-12

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Santosh Sharma ,  Ju Jason Zhang

IPC: H02J7/00 ,  H01L23/495 ,  H01L27/02 ,  H01L23/62 ,  H02M1/088 ,  H02M3/158 ,  H03K3/012 ,  H01L29/20 ,  H03K17/10 ,  H03K19/0185 ,  H01L25/07 ,  H02M3/157 ,  H03K3/356 ,  H01L27/088 ,  H01L23/528 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417

Abstract: GaN-based half bridge power conversion circuits employ control, support and logic functions that are monolithically integrated on the same devices as the power transistors. In some embodiments a low side GaN device communicates through one or more level shift circuits with a high side GaN device. Various embodiments of level shift circuits and their inventive aspects are disclosed.

公开(公告)号：US12261519B2

公开(公告)日：2025-03-25

申请号：US18463198

申请日：2023-09-07

Applicant: Navitas Semiconductor Limited

Inventor： Marco Giandalia ,  Jason Zhang ,  Hongwei Jia ,  Daniel M. Kinzer

IPC: H02M3/155 ,  G05F1/573 ,  H02M1/08 ,  H02M1/32 ,  H02M3/158 ,  H03K3/012 ,  H02H9/02

Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.

公开(公告)号：US20240355717A1

公开(公告)日：2024-10-24

申请号：US18636035

申请日：2024-04-15

Applicant: Navitas Semiconductor Limited

Inventor： Alfred Hesener ,  Daniel M. Kinzer ,  Vincent Dessard ,  Marco Giandalia

IPC: H01L23/495 ,  H01L23/00 ,  H01L25/065 ,  H03K17/687

CPC classification number: H01L23/49575 ,  H01L23/49562 ,  H01L24/08 ,  H01L24/48 ,  H01L25/0652 ,  H03K17/6871 ,  H01L2224/08145 ,  H01L2224/08245 ,  H01L2224/48138 ,  H01L2224/48175 ,  H01L2924/01029 ,  H01L2924/0493 ,  H01L2924/1205 ,  H01L2924/13091 ,  H01L2924/182 ,  H03K2217/0063 ,  H03K2217/0072

Abstract: An electronic system is disclosed. The electronic system includes an electronic package having a base with a plurality of external terminals, and further having an electrically insulative material at least partially encapsulating the base, a controller circuit disposed within the electronic package and referenced to a first ground, a first and second driver circuits disposed within the electronic package and referenced to a second ground and arranged to receive isolated control signals from the controller circuit, and a bidirectional switch disposed within the electronic package and referenced to the second ground and arranged to receive drive signals from the first and second driver circuits. In one aspect, the first and second driver circuits are isolated from the controller circuit via capacitors, or magnetics, or optocouplers, or magneto resistors.

公开(公告)号：US11870429B2

公开(公告)日：2024-01-09

申请号：US18064185

申请日：2022-12-09

Applicant: Navitas Semiconductor Limited

Inventor： Santosh Sharma ,  Daniel M. Kinzer ,  Ren Huei Tzeng

IPC: H03K17/082 ,  G05F3/26 ,  H01L29/20 ,  H03K17/687

CPC classification number: H03K17/0822 ,  G05F3/262 ,  H01L29/2003 ,  H03K17/6871

Abstract: An electronic device includes a semiconductor substrate and a bidirectional transistor switch formed on the substrate, the bidirectional switch including a first source node, a second source node and a common drain node. A first transistor is formed on the substrate and includes a first source terminal, a first drain terminal and a first gate terminal, wherein the first source terminal is connected to the substrate, the first drain terminal is connected to the first source node and the first gate terminal is connected to the second source node. A second transistor is formed on the substrate and includes a second source terminal, a second drain terminal and a second gate terminal, wherein the second source terminal is connected to the substrate, the second drain terminal is connected to the second source node and the second gate terminal is connected to the first source node.

公开(公告)号：US20230421046A1

公开(公告)日：2023-12-28

申请号：US18463198

申请日：2023-09-07

Applicant: Navitas Semiconductor Limited

Inventor： Marco Giandalia ,  Jason Zhang ,  Hongwei Jia ,  Daniel M. Kinzer

IPC: H02M1/08 ,  H02M1/32 ,  H02M3/158 ,  H02M3/155 ,  H03K3/012 ,  G05F1/573

CPC classification number: H02M1/08 ,  H02M1/32 ,  H02M3/158 ,  H02M3/155 ,  H03K3/012 ,  G05F1/573 ,  H02H9/02

Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.

公开(公告)号：US20230387067A1

公开(公告)日：2023-11-30

申请号：US18339123

申请日：2023-06-21

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Jason Zhang ,  Thomas Ribarich

IPC: H01L23/00 ,  H01L23/495 ,  H01L25/18 ,  H02M7/219

CPC classification number: H01L24/48 ,  H01L23/4951 ,  H01L23/49575 ,  H01L25/18 ,  H02M7/219 ,  H01L2924/1425 ,  H01L2924/15333 ,  H01L2224/48229 ,  H01L29/2003

Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.

公开(公告)号：US11594970B2

公开(公告)日：2023-02-28

申请号：US17575536

申请日：2022-01-13

Applicant: Navitas Semiconductor Limited

Inventor： Thomas Ribarich ,  Daniel M. Kinzer ,  Tao Liu ,  Marco Giandalia ,  Victor Sinow

IPC: G05F1/573 ,  G05F3/26 ,  H02M3/158 ,  H02M1/00

Abstract: A circuit is disclosed. The circuit includes a current detecting FET, configured to generate a current signal indicative of the value of the current flowing therethrough, an operational transconductance amplifier (OTA) configured to output a current in response to the voltage of the current signal, and a resistor configured to receive the current and to generate a voltage in response to the received current, where the generated voltage is indicative of the value of the current flowing through the current detecting FET. The current detecting FET is configured to become nonconductive in response to the generated voltage indicating that the current flowing through the current detecting FET is greater than a threshold.

公开(公告)号：US20230006658A1

公开(公告)日：2023-01-05

申请号：US17853749

申请日：2022-06-29

Applicant: Navitas Semiconductor Limited

Inventor： Marco Giandalia ,  Jason Zhang ,  Hongwei Jia ,  Daniel M. Kinzer

IPC: H03K3/012 ,  H02M3/155

Abstract: A circuit is disclosed. The circuit includes a first transistor including a first drain terminal, a first gate terminal and a first source terminal, a depletion-mode transistor including a second drain terminal, a second gate terminal and a second source terminal, the second drain terminal connected to the first drain terminal, the depletion-mode transistor arranged to sense a first voltage at the first drain terminal and generate a second voltage at the second source terminal, and a comparator arranged to receive the second voltage, and transition the first transistor from an on state to an off state in response to the first transistor entering its saturation region of operation. In one aspect, the first transistor includes gallium nitride (GaN). In another aspect, the circuit further includes a logic circuit arranged to receive an output voltage generated by the comparator and to drive the first gate terminal.

公开(公告)号：US20220310476A1

公开(公告)日：2022-09-29

申请号：US17738989

申请日：2022-05-06

Applicant: Navitas Semiconductor Limited

Inventor： Charles Bailley ,  George Chu ,  Daniel M. Kinzer

IPC: H01L23/367 ,  H01L21/48 ,  H01L25/00 ,  H01L25/07

Abstract: An electronic device includes a substrate and a first gallium nitride (GaN) transistor formed on a first semiconductor die that is electrically coupled to the substrate. A second GaN transistor is formed on a second semiconductor die and is also electrically coupled to the substrate. An integral heat spreader is thermally coupled to the first and the second gallium nitride semiconductor dies and is electrically coupled to the substrate. A first bias voltage is applied to the first GaN transistor via the integral heat spreader and a second bias voltage is applied to the second GaN transistor via the integral heat spreader.

公开(公告)号：US20220102251A1

公开(公告)日：2022-03-31

申请号：US17448324

申请日：2021-09-21

Applicant: Navitas Semiconductor Limited

Inventor： Daniel M. Kinzer ,  Jason Zhang ,  Thomas Ribarich

IPC: H01L23/495 ,  H01L23/00 ,  H01L25/16

Abstract: An electronic power conversion component includes an electrically conductive package base comprising a source terminal, a drain terminal, at least one I/O terminal and a die-attach pad wherein the source terminal is electrically isolated from the die-attach pad. A GaN-based semiconductor die is secured to the die attach pad and includes a power transistor having a source and a drain, wherein the source is electrically coupled to the source terminal and the drain is electrically coupled to the drain terminal. A plurality of wirebonds electrically couple the source to the source terminal and the drain to the drain terminal. An encapsulant is formed over the GaN-based semiconductor die, the plurality of wirebonds and at least a top surface of the package base.