摘要:
An object of the present invention is to realize reduction in an area of an output stage driver in an interface circuit that switches between two transmission systems. The interface circuit has two driver circuits and a drive control circuit that can switch between two driving systems that are a voltage driving system and a current driving system. The two driver circuits are connected to a power supply potential via the drive control circuit. Two input signals and inverted logic signals of the input signals are inputted via a selection circuit. According to a control signal inputted into the drive control circuit, the interface circuit switches between the voltage-driving type single-ended transmission system and current driving type differential transmission system.
摘要:
The digital map data processing system of the invention aims to improve the appearance of a map without increasing the labor in automatic generation of road polygons required for generation of map data. The digital map data processing system of the invention reads network data 40, which expresses multiple roads by nodes and links, and generates polygon data 50 including road polygons by processing the network data 40. The road polygon generation process includes generation of rectangular polygons of specified widths about respective links, generation of edge lines around polygons, and elimination of unnecessary edge lines. The digital map data processing system selectively applies a suitable terminal processing technique to specify terminal geometry of each object polygon, based on connection with each connection polygon and geometries and attributes of the object polygon and the connection polygon. This desirably improves the appearance at a connection of adjacent polygons.
摘要:
Fine-pitch first and second bonding pads are formed on a chip along its perimeter. The first bonding pads are formed at the peripheral parts on the chip, while the second bonding pads are formed inside the peripheral parts. An ESD protection circuit is connected to the first bonding pad, and an I/O circuit is connected to the second bonding pad. First and second bonding wires connect the first and second bonding pads to the same package pin, respectively. The second bonding wire is configured to be sufficiently longer than the first bonding wire, regardless of the pitch of the first bonding pads.
摘要:
First and second transmission lines and are connected to each other in series. A first terminator is connected to the first transmission line in parallel, and is provided externally of a semiconductor device. A second terminator is connected to the second transmission line in parallel, and is provided inside the semiconductor device. The values of the first and second terminator are adjusted so that the combined resistance value of first and second terminator and the second transmission line matches with the impedance of the first transmission line. Impedance matching of the entire transmission line can be achieved with this simple construction, thus, a stable, high quality signal can be transmitted.
摘要:
A multi-element type chip device of the present invention includes an elongate chip substrate (10), 2n pairs of opposed electrodes (12a) [n representing a positive integer] formed on a surface of the chip substrate (10) at a generally constant interval longitudinally of the chip substrate, device elements (131-134) each formed between a respective pair of electrodes, and a protective coating (14-16) formed to cover the device elements (131-134) in a row extending longitudinally of the chip substrate (10). A (2m-1)th device element (131, 133) [m representing a positive integer not exceeding n] as counted from one end (10a) of the chip substrate (10) has a widthwise center which is offset from a widthwise center of a corresponding pair of electrodes (12a) toward the other end (10b) of the chip substrate (10). A (2m)th device element (132, 134) as counted from the one end of the chip substrate (10) has a widthwise center which is offset from a widthwise center of a corresponding pair of electrodes (12a) toward the one end (10a) of the chip substrate (10).
摘要:
An optical transmission system for optically transmitting information between apparatuses via an optical transmission path. The system includes: a sending unit that emits, to the optical transmission path, excitation light for detecting an inter-apparatus connection via the path; a responding unit that receives the excitation light from the path and emits detection light to the path using light energy of the excitation light; a response receiving unit that receives the detection light from the path and outputs a detection light current; a detecting unit that detects presence/absence of the inter-apparatus connection based on the detection light current; a light signal transmitting unit that emits, to the path, a light signal for optically transmitting the information based on the detection result by the detecting unit; and a light signal receiving unit that receives the light signal from the path.
摘要:
A shoe midsole has a sole plate, a plurality of blades integrally standing on the sole plate, a cover bonded to the circumference of the sole plate, and a fluid sealed between the sole plate and the cover. A first concave part in a shape equivalent to a sole of a foot is formed on the surface of the sole plate, on which the plurality of blades stand, wherein the plurality of blades are accommodated within the first concave part. The plurality of blades are aligned at a predetermined interval in a direction nearly orthogonal to the longitudinal direction of the sole plate, and some of the plurality of blades are tilted toward the toe.
摘要:
A serial-parallel conversion circuit provided on one end of a cable body converts a first serial signal into parallel signals and outputs the parallel signals to parallel signal lines. A parallel-serial conversion circuit provided on another end of the cable body converts the parallel signals inputted from the parallel signal lines into a second serial signal and outputs the second serial signal to outside.
摘要:
A card controller receives data from a recording card via a socket. A read clock is transmitted in a main transmission wiring, and the data is transmitted in a data transmission wiring. The read clock is withdrawn from the card controller by an outgoing transmission wiring and retrieved into the card controller by an incoming transmission wiring. A transmission delay amount of the outgoing transmission wiring is equal to that of the main transmission wiring, and a transmission delay amount of the incoming transmission wiring is equal to that of the data transmission wiring. The card controller receives the data in synchronization with the read clock retrieved by the incoming transmission wiring.
摘要:
A device and method for encrypting content in an encryption device including a content-key storage section is disclosed. The method includes generating a content-key used for encrypting content based on random numbers and storing the generated content-key in the content-key storage section, encrypting the content-key used for encrypting the content so as to obtain an encrypted content-key and outputting the encrypted content-key to outside of the encryption device, determining whether or not a value of the content-key storage section in its initial state and a current value of the content-key storage section are different, and when it is determined that the value of the content-key storage section in its initial state and the current value of the content-key storage section are different, encrypting the content using the current value of the content-key storage section as a content-key so as to obtain a second output data and output the second output data to outside of the encryption device, wherein, for the determination step, a register stores a value of the content-key storage section at the time that said register receives a Power On Reset (POR) signal, and wherein the POR signal is a signal which pulses only once immediately after power-on or immediately after reset, so that the content-key storage section is in an initial state immediately after a corresponding power-on or reset of the encryption device.