N-phase signal transition alignment
    21.
    发明授权
    N-phase signal transition alignment 有权
    N相信号转换对齐

    公开(公告)号:US09276731B2

    公开(公告)日:2016-03-01

    申请号:US14453346

    申请日:2014-08-06

    Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. Drivers may be adapted or configured to align state transitions on two or more connectors in order to minimize a transition period between consecutive symbols. The drivers may include circuits that advance or delay certain transitions. The drivers may include pre-emphasis circuits that operate to drive the state of a connector for a portion of the transition period, even when the connector is transitioned to an undriven state.

    Abstract translation: 描述了促进数据传输的系统,方法和装置,特别是在电子设备内的两个设备之间。 信息以N相极性编码符号发送。 驱动器可以被适配或配置成在两个或更多个连接器上对准状态转换,以使连续符号之间的过渡周期最小化。 驱动器可以包括推进或延迟某些转换的电路。 驱动器可以包括预加重电路,即,即使当连接器转换到未驱动状态时,该预加重电路用于驱动连接器的一部分过渡期的状态。

    N-phase phase and polarity encoded serial interface
    22.
    发明授权
    N-phase phase and polarity encoded serial interface 有权
    N相和极性编码串行接口

    公开(公告)号:US09231790B2

    公开(公告)日:2016-01-05

    申请号:US14090625

    申请日:2013-11-26

    Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. Data is encoded in multi-bit symbols, and the multi-bit symbols are transmitted on a plurality of connectors. The multi-bit symbols may be transmitted by mapping the symbols to a sequence of states of the plurality of connectors, and driving the connectors in accordance with the sequence of states. The timing of the sequence of states is determinable at a receiver at each transition between sequential states. The state of each connector may be defined by polarity and direction of rotation of a multi-phase signal transmitted on the each connector.

    Abstract translation: 描述了促进数据传输的系统,方法和装置,特别是在电子设备内的两个设备之间。 信息以N相极性编码符号发送。 数据以多位符号编码,并且多位符号在多个连接器上传输。 可以通过将符号映射到多个连接器的状态序列来传输多比特符号,并且根据状态序列来驱动连接器。 状态序列的定时可以在连续状态之间的每个转换处在接收器处确定。 每个连接器的状态可以由在每个连接器上传输的多相信号的极性和旋转方向来定义。

    ANALOG BEHAVIOR MODELING FOR 3-PHASE SIGNALING
    23.
    发明申请
    ANALOG BEHAVIOR MODELING FOR 3-PHASE SIGNALING 有权
    用于三相信号的模拟行为建模

    公开(公告)号:US20150201052A1

    公开(公告)日:2015-07-16

    申请号:US14156329

    申请日:2014-01-15

    Abstract: System, methods and apparatus are described that model analog behavior in a multi-wire, multi-phase communications link. A digital signal representative of a physical connection in a communications link and a virtual signal characterizing a three-phase signal transmitted over the physical connection are generated. The virtual signal may be configured to model one or more analog characteristics of the physical connection. The analog characteristics may include voltage states defining the three-phase signal. The analog characteristics of the physical connection include at least three voltage states corresponding to signaling states of the three-phase signal.

    Abstract translation: 描述了在多线,多相通信链路中模拟模拟行为的系统,方法和装置。 生成表示通信链路中的物理连接的数字信号和表征通过物理连接发送的三相信号的虚拟信号。 虚拟信号可以被配置为建模物理连接的一个或多个模拟特性。 模拟特性可以包括定义三相信号的电压状态。 物理连接的模拟特性包括与三相信号的信令状态对应的至少三个电压状态。

    Sharing hardware resources between D-PHY and N-factorial termination networks
    24.
    发明授权
    Sharing hardware resources between D-PHY and N-factorial termination networks 有权
    在D-PHY和N-factorial终端网络之间共享硬件资源

    公开(公告)号:US08970248B2

    公开(公告)日:2015-03-03

    申请号:US14210246

    申请日:2014-03-13

    Abstract: A termination network for a receiver device is provided to support both D-PHY signaling and N-factorial signaling. The first end of each of a plurality dynamically configurable switches is coupled to a common node. A first end of each of a plurality of resistances is coupled to a second end of a corresponding switch. A plurality of terminals receive differential signals and each terminal is coupled to a corresponding second end of a resistance. Each of a plurality differential receivers is coupled between two terminals of the termination network, wherein a first differential receiver and a second differential receiver are coupled to the same two terminals, the first differential receiver is used when the differential signals use a first type of differential signal encoding, the second differential receiver is used when the differential signals use a second type of differential signal encoding.

    Abstract translation: 提供用于接收机设备的终端网络以支持D-PHY信令和N阶因子信令。 多个动态可配置开关中的每一个的第一端耦合到公共节点。 多个电阻中的每一个的第一端耦合到相应开关的第二端。 多个端子接收差分信号,并且每个端子耦合到电阻的对应的第二端。 多个差分接收器中的每一个耦合在终端网络的两个终端之间,其中第一差分接收机和第二差分接收机耦合到相同的两个终端,当差分信号使用第一类型的差分时,使用第一差分接收机 信号编码时,当差分信号使用第二类型的差分信号编码时,使用第二差分接收机。

    THREE PHASE CLOCK RECOVERY DELAY CALIBRATION
    25.
    发明申请
    THREE PHASE CLOCK RECOVERY DELAY CALIBRATION 有权
    三相时钟恢复延迟校准

    公开(公告)号:US20150030112A1

    公开(公告)日:2015-01-29

    申请号:US14336572

    申请日:2014-07-21

    Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. A clock recovery circuit may be calibrated based on state transitions in a preamble transmitted on two or more connectors. A calibration method is described. The method includes detecting a plurality of transitions in a preamble of a multiphase signal and calibrating a delay element to provide a delay that matches a clocking period of the multiphase signal. Each transition may be detected by only one of a plurality of detectors. The delay element may be calibrated based on time intervals between detections of successive ones of the plurality of transitions.

    Abstract translation: 描述了促进数据传输的系统,方法和装置,特别是在电子设备内的两个设备之间。 信息以N相极性编码符号发送。 时钟恢复电路可以基于在两个或更多个连接器上发送的前置码中的状态转换来校准。 描述校准方法。 该方法包括检测多相信号的前导码中的多个转换并校准延迟元件以提供与多相信号的计时周期匹配的延迟。 每个转换可以仅由多个检测器中的一个检测。 延迟元件可以基于多个转换中的连续检测之间的时间间隔进行校准。

    VOLTAGE MODE DRIVER CIRCUIT FOR N-PHASE SYSTEMS
    26.
    发明申请
    VOLTAGE MODE DRIVER CIRCUIT FOR N-PHASE SYSTEMS 有权
    用于N相系统的电压模式驱动电路

    公开(公告)号:US20140254712A1

    公开(公告)日:2014-09-11

    申请号:US14199064

    申请日:2014-03-06

    CPC classification number: H04B3/06 G06F13/4072 Y02D10/14 Y02D10/151

    Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. Each of the three terminals may be driven such that transistors are activated to couple a terminal to first and second voltage levels through a pair of impedances when the terminal would otherwise be undriven. The terminal is then pulled toward an intermediate voltage level while the terminal presents a desired impedance level to a transmission line.

    Abstract translation: 描述了促进数据传输的系统,方法和装置,特别是在电子设备内的两个设备之间。 当传输线否则将被驱动时,传输线选择性地终止在N相极性编码的发射机中。 数据被映射到要在多根线上传输的符号序列。 符号序列被编码为三个信号。 可以驱动三个端子中的每一个,使得晶体管被激活以在端子否则将不被引导时通过一对阻抗将端子耦合到第一和第二电压电平。 然后将终端拉向中间电压电平,同时终端向传输线呈现期望的阻抗电平。

    N-PHASE PHASE AND POLARITY ENCODED SERIAL INTERFACE
    27.
    发明申请
    N-PHASE PHASE AND POLARITY ENCODED SERIAL INTERFACE 有权
    N相相位和极性编码串行接口

    公开(公告)号:US20140153665A1

    公开(公告)日:2014-06-05

    申请号:US14090625

    申请日:2013-11-26

    Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Information is transmitted in N-phase polarity encoded symbols. Data is encoded in multi-bit symbols, and the multi-bit symbols are transmitted on a plurality of connectors. The multi-bit symbols may be transmitted by mapping the symbols to a sequence of states of the plurality of connectors, and driving the connectors in accordance with the sequence of states. The timing of the sequence of states is determinable at a receiver at each transition between sequential states. The state of each connector may be defined by polarity and direction of rotation of a multi-phase signal transmitted on the each connector.

    Abstract translation: 描述了促进数据传输的系统,方法和装置,特别是在电子设备内的两个设备之间。 信息以N相极性编码符号发送。 数据以多位符号编码,并且多位符号在多个连接器上传输。 可以通过将符号映射到多个连接器的状态序列来传输多比特符号,并且根据状态序列来驱动连接器。 状态序列的定时可以在连续状态之间的每个转换处在接收器处确定。 每个连接器的状态可以由在每个连接器上传输的多相信号的极性和旋转方向来定义。

    N-PHASE POLARITY OUTPUT PIN MODE MULTIPLEXER
    28.
    发明申请
    N-PHASE POLARITY OUTPUT PIN MODE MULTIPLEXER 有权
    N相极性输出引脚模式多路复用器

    公开(公告)号:US20140006649A1

    公开(公告)日:2014-01-02

    申请号:US13895651

    申请日:2013-05-16

    Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within an electronic apparatus. Data is selectively transmitted as N-phase polarity encoded symbols or as packets on differentially driven connectors. A desired operational mode for communicating between the two devices is determined, an encoder is selected to drive a plurality of connectors communicatively coupling the two devices, and a plurality of drivers is configured to receive encoded data from the encoder and drive the plurality of connectors. Switches may couple outputs of the selected encoder to the plurality of drivers. One or more outputs of another encoder may be caused or forced to enter a high impedance mode.

    Abstract translation: 描述了促进数据传输的系统,方法和装置,特别是在电子设备内的两个设备之间。 选择性地将数据作为N相极性编码的符号或作为差分驱动的连接器上的分组发送。 确定用于在两个设备之间通信的期望的操作模式,选择编码器来驱动通信地耦合两个设备的多个连接器,并且多个驱动器被配置为从编码器接收编码数据并驱动多个连接器。 开关可以将所选择的编码器的输出耦合到多个驱动器。 可能引起另一个编码器的一个或多个输出或强制进入高阻抗模式。

    C-PHY receiver equalization
    29.
    发明授权

    公开(公告)号:US10454725B1

    公开(公告)日:2019-10-22

    申请号:US16144582

    申请日:2018-09-27

    Abstract: Methods, apparatus, and systems for data communication over a multi-wire, multi-phase interface are disclosed. A method includes equalizing three-phase signals received from two wires of the interface to provide equalized signals, providing first and second difference signals by comparing voltage differences between the equalized signals with first and second reference voltage levels respectively, capturing delayed and undelayed versions of the second difference signal using flipflops triggered by different edges in the first difference signal, and adjusting an equalizing circuit until outputs of the first flipflops indicate that a ratio of low-frequency attenuation to high-frequency amplification has been achieved that enables information to be accurately decoded from the three-phase signals. The three-phase signal received from a first of the two wires is in a different phase than the three-phase signal received from a second of the two wires.

    Low power physical layer driver topologies

    公开(公告)号:US10419252B2

    公开(公告)日:2019-09-17

    申请号:US16050603

    申请日:2018-07-31

    Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two devices within electronic equipment. Transmission lines are selectively terminated in an N-phase polarity encoded transmitter when the transmission lines would otherwise be undriven. Data is mapped to a sequence of symbols to be transmitted on a plurality of wires. The sequence of symbols is encoded in three signals. A first terminal of a plurality of terminals may be driven such that transistors are activated to couple the first terminal to first and second voltage levels. The first terminal may further be driven such that a dedicated transistor is activated to couple the first terminal to an intermediate voltage level.

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