Addressing for customer premises LAN expansion

    公开(公告)号:US10404648B2

    公开(公告)日:2019-09-03

    申请号:US15054863

    申请日:2016-02-26

    申请人: Sanjay Wadhwa Jun Hu

    发明人: Sanjay Wadhwa Jun Hu

    摘要: The present disclosure generally discloses an addressing mechanism adapted for extending a customer local area network of a customer premises of a customer outside of the customer premises and into a private data network with improved scalability and performance. The extension of a local area network of a customer premises of a customer outside of the customer premises and into a private data network may be provided using a customer bridge associated with the customer local area network of the customer, a customer bridging domain hosted on a network gateway device for the customer, and a switching element hosted in the private data network for the customer for one or more customer components hosted within the private data network for the customer. The addressing mechanism may include one or more of address announcement functions, address resolution functions, address translation functions, or the like, as well as various combinations thereof.

    Top Structure of Super Junction MOSFETS and Methods of Fabrication

    公开(公告)号:US20190221644A1

    公开(公告)日:2019-07-18

    申请号:US15185507

    申请日:2016-06-17

    申请人: Jun Hu

    发明人: Jun Hu

    IPC分类号: H01L29/10 H01L29/06 H01L29/78

    摘要: This invention discloses a semiconductor power device formed on an upper epitaxial layer of a first conductivity type supported on a semiconductor substrate. The semiconductor power device having a super junction structure with the epitaxial layer formed with a plurality of vertically extended doped columns of a second conductivity type. The semiconductor power device further comprises a plurality of transistor cells each of the transistor cells comprises a planar gate extending over a top surface and each of the planar gates further includes a middle trench gate extending vertically into the epitaxial layer from a middle portion of the planar gates. Each of the middle trench gates is surrounded by a source region of the first conductivity type encompassed in a body region of the second conductivity type extending substantially between two adjacent doped columns of the second conductivity type.

    EDGE TERMINATION DESIGNS FOR SEMICONDUCTOR POWER DEVICES

    公开(公告)号:US20190206986A1

    公开(公告)日:2019-07-04

    申请号:US15076553

    申请日:2016-03-21

    摘要: This invention discloses a semiconductor power device formed on a semiconductor substrate comprises an active cell area and a termination area disposed near edges of the semiconductor substrate. The termination area comprises a plurality of duplicated units wherein each unit includes at least two trenches filled with a conductive trench material having a mesa area between adjacent trenches wherein the trenches and the mesa areas within each of the duplicated units are electrically shunt together. In the termination area each of the trenches in the duplicated units has a buried guard ring dopant region disposed below a bottom surface of the trenches.

    LED actuating device and method
    25.
    发明授权
    LED actuating device and method 有权
    LED驱动装置及方法

    公开(公告)号:US09572209B2

    公开(公告)日:2017-02-14

    申请号:US14529255

    申请日:2014-10-31

    申请人: Jun Hu

    CPC分类号: H05B33/0815 H05B33/0851

    摘要: An actuating device comprises an LED actuating module. Said LED actuating module comprises a micro-programmed control unit (MCU), an actuator, a VF-value detection module, a PN-junction temperature acquisition module and an LED lamp unit. The MCU determines the current value matched with the LED lamp unit based on the VF value detected by the VF-value detection module and the temperature value detected by the PN-junction temperature acquisition module, and then determines the width of the PWM pulse output to the actuator according to the current value, and the actuator actuates an LED to operate at the matched current value.

    摘要翻译: 致动装置包括LED致动模块。 所述LED驱动模块包括微编程控制单元(MCU),致动器,VF值检测模块,PN结温度采集模块和LED灯单元。 MCU根据VF值检测模块检测到的VF值和PN结温度采集模块检测到的温度值,确定与LED灯具单元匹配的电流值,然后确定PWM脉冲输出的宽度 执行器根据当前值,并且致动器致动LED以在匹配的电流值下操作。

    BISTRIFILATE-BASED FLUOROGENIC PROBES FOR DETECTION OF SUPEROXIDE ANION RADICAL
    27.
    发明申请
    BISTRIFILATE-BASED FLUOROGENIC PROBES FOR DETECTION OF SUPEROXIDE ANION RADICAL 审中-公开
    用于检测超氧化物阴离子辐射的基于双歧杆菌的荧光探针

    公开(公告)号:US20150219676A1

    公开(公告)日:2015-08-06

    申请号:US14597408

    申请日:2015-01-15

    摘要: The invention provides fluorogenic compounds and probes that can be used as reagents for measuring, detecting and/or screening superoxide. The fluorogenic compounds of the invention can produce fluorescence colors, such as green, yellow, red, or far-red. The invention further provides fluorogenic compounds for selectively staining superoxide in the mitochondria of living cells. The invention also provides methods that can be used to measure, directly or indirectly, the presence and/or amount of superoxide in chemical samples and biological samples such as cells and tissues in living organisms, and a high-throughput screening methods for detecting or screening superoxide or compounds that can increase or decrease the level of superoxide in chemical and biological samples.

    摘要翻译: 本发明提供可用作测量,检测和/或筛选超氧化物的试剂的荧光化合物和探针。 本发明的荧光化合物可以产生荧光颜色,例如绿色,黄色,红色或远红色。 本发明还提供了用于选择性染色活细胞线粒体中超氧化物的荧光化合物。 本发明还提供了可用于直接或间接测量化学样品和生物样品如生物体中的细胞和组织的超氧化物的存在和/或量的方法,以及用于检测或筛选的高通量筛选方法 超氧化物或可增加或降低化学和生物样品中超氧化物水平的化合物。

    DUAL-GATE TRENCH IGBT WITH BURIED FLOATING P-TYPE SHIELD
    29.
    发明申请
    DUAL-GATE TRENCH IGBT WITH BURIED FLOATING P-TYPE SHIELD 有权
    双栅双极型IGBT,带有浮动P型屏蔽

    公开(公告)号:US20140264433A1

    公开(公告)日:2014-09-18

    申请号:US13831066

    申请日:2013-03-14

    IPC分类号: H01L29/739 H01L29/66

    摘要: A method of manufacturing an insulated gate bipolar transistor (IGBT) device comprising 1) preparing a semiconductor substrate with an epitaxial layer of a first conductivity type supported on the semiconductor substrate of a second conductivity type; 2) applying a gate trench mask to open a first trench and second trench followed by forming a gate insulation layer to pad the trench and filling the trench with a polysilicon layer to form the first trench gate and the second trench gate; 3) implanting dopants of the first conductivity type to form an upper heavily doped region in the epitaxial layer; and 4) forming a planar gate on top of the first trench gate and apply implanting masks to implant body dopants and source dopants to form a body region and a source region near a top surface of the semiconductor substrate.

    摘要翻译: 一种制造绝缘栅双极晶体管(IGBT)器件的方法,包括:1)制备具有第一导电类型的外延层的半导体衬底,该半导体衬底支撑在第二导电类型的半导体衬底上; 2)施加栅极沟槽掩模以打开第一沟槽和第二沟槽,随后形成栅极绝缘层以衬垫沟槽并用多晶硅层填充沟槽以形成第一沟槽栅极和第二沟槽栅极; 3)注入第一导电类型的掺杂剂以在外延层中形成上重掺杂区; 以及4)在所述第一沟槽栅极的顶部上形成平面栅极,并且将注入掩模施加到植入物体掺杂剂和源掺杂剂以在所述半导体衬底的顶表面附近形成体区域和源极区域。