公开(公告)号：US06514779B1

公开(公告)日：2003-02-04

申请号：US09981523

申请日：2001-10-17

申请人： Sei-Hyung Ryu ,  Anant Agarwal ,  Craig Capell ,  John W. Palmour

发明人： Sei-Hyung Ryu ,  Anant Agarwal ,  Craig Capell ,  John W. Palmour

IPC分类号： G01R3126

CPC分类号： G01R31/2831 ,  H01L22/22 ,  H01L2924/0002 ,  H01L2924/00

摘要： A silicon carbide device is fabricated by forming a plurality of a same type of silicon carbide devices on at least a portion of a silicon carbide wafer in a predefined pattern. The silicon carbide devices have corresponding first contacts on a first face of the silicon carbide wafer. The plurality of silicon carbide devices are electrically, tested to identify ones of the plurality of silicon carbide devices which pass an electrical test. The first contact of the identified ones of the silicon carbide devices are then selectively interconnected. Devices having a plurality of selectively connected silicon carbide devices of the same type are also provided.

摘要翻译： 通过在预定图案的碳化硅晶片的至少一部分上形成多个相同类型的碳化硅器件来制造碳化硅器件。 碳化硅器件在碳化硅晶片的第一面上具有对应的第一接触。 多个碳化硅器件被电学测试以识别通过电测试的多个碳化硅器件中的一个。 所识别的碳化硅器件的第一接触然后被选择性地互连。 还提供了具有相同类型的多个选择性连接的碳化硅器件的器件。

公开(公告)号：US09142662B2

公开(公告)日：2015-09-22

申请号：US13108440

申请日：2011-05-16

申请人： Sei-Hyung Ryu ,  Doyle Craig Capell ,  Lin Cheng ,  Sarit Dhar ,  Charlotte Jonas ,  Anant Agarwal ,  John Palmour

发明人： Sei-Hyung Ryu ,  Doyle Craig Capell ,  Lin Cheng ,  Sarit Dhar ,  Charlotte Jonas ,  Anant Agarwal ,  John Palmour

IPC分类号： H01L29/78 ,  H01L29/06 ,  H01L29/739 ,  H01L29/04 ,  H01L29/16

CPC分类号： H01L29/7802 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/7395

摘要： A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.

摘要翻译： 半导体器件包括具有第一导电类型的漂移层，漂移层中具有与第一导电类型相反的第二导电类型的阱区以及阱区中的源极区。源极区具有第一导电类型并且限定 在井区域中的通道区域。 源极区域包括与沟道区域相邻的横向源极区域和远离与沟道区域相对的横向源极区域延伸的多个源极接触区域。 具有第二导电类型的体接触区域在多个源极接触区域中的至少两个之间并且与阱区域接触。 源欧姆触点与源极接触区域和身体接触区域中的至少一个重叠。 半导体器件的源极接触区域的最小尺寸由源极欧姆接触和至少一个源极接触区域之间的重叠区域限定。

公开(公告)号：US20130034941A1

公开(公告)日：2013-02-07

申请号：US13196994

申请日：2011-08-03

申请人： Sarit Dhar ,  Sei-Hyung Ryu ,  Anant Agarwal ,  John Robert Williams

发明人： Sarit Dhar ,  Sei-Hyung Ryu ,  Anant Agarwal ,  John Robert Williams

IPC分类号： H01L21/336 ,  H01L21/31

CPC分类号： H01L21/3115 ,  H01L21/049 ,  H01L29/0878 ,  H01L29/1608 ,  H01L29/408 ,  H01L29/51 ,  H01L29/66068 ,  H01L29/78 ,  H01L29/7802

摘要： Methods of forming a semiconductor structure include providing an insulation layer on a semiconductor layer and diffusing cesium ions into the insulation layer from a cesium ion source outside the insulation layer. A MOSFET including an insulation layer treated with cesium ions may exhibit increased inversion layer mobility.

摘要翻译： 形成半导体结构的方法包括在半导体层上提供绝缘层，并且将铯离子从绝缘层外部的铯离子源扩散到绝缘层中。 包括用铯离子处理的绝缘层的MOSFET可能表现出增加的反型层迁移率。

公开(公告)号：US07598567B2

公开(公告)日：2009-10-06

申请号：US11556448

申请日：2006-11-03

申请人： Allen Hefner ,  Sei-Hyung Ryu ,  Anant Agarwal

发明人： Allen Hefner ,  Sei-Hyung Ryu ,  Anant Agarwal

IPC分类号： H01L29/76

CPC分类号： H01L29/7803 ,  H01L21/0465 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/1608 ,  H01L29/41766 ,  H01L29/6606 ,  H01L29/66068 ,  H01L29/7802 ,  H01L29/7828 ,  H01L29/861

摘要： A semiconductor device includes a drift layer having a first conductivity type and a body region adjacent the drift layer. The body region has a second conductivity type opposite the first conductivity type and forms a p-n junction with the drift layer. The device further includes a contactor region in the body region and having the first conductivity type, and a shunt channel region extending through the body region from the contactor region to the drift layer. The shunt channel region has the first conductivity type. The device further includes a first terminal in electrical contact with the body region and the contactor region, and a second terminal in electrical contact with the drift layer. The shunt channel region has a length, thickness and doping concentration selected such that: 1) the shunt channel region is fully depleted when zero voltage is applied across the first and second terminals, 2) the shunt channel becomes conductive at a voltages less than the built-in potential of the drift layer to body region p-n junction, and/or 3) the shunt channel is not conductive for voltages that reverse biase the p-n junction between the drift region and the body region.

摘要翻译： 半导体器件包括具有第一导电类型的漂移层和与漂移层相邻的体区。 身体区域具有与第一导电类型相反的第二导电类型，并与漂移层形成p-n结。 该器件还包括在体区中具有第一导电类型的接触器区域和从接触器区域延伸穿过体区的分流通道区域到漂移层。 分流通道区域具有第一导电类型。 该装置还包括与主体区域和接触器区域电接触的第一端子和与漂移层电接触的第二端子。 分流沟道区域具有选择的长度，厚度和掺杂浓度，使得：1）当跨越第一和第二端子施加零电压时，并联沟道区域完全耗尽，2）并联沟道在小于 内部电位漂移层到体区pn结，和/或3）并联通道对于反向偏置漂移区和体区之间的pn结的电压不导通。

公开(公告)号：US20060261348A1

公开(公告)日：2006-11-23

申请号：US11159972

申请日：2005-06-23

申请人： Sei-Hyung Ryu ,  Jason Jenny ,  Mrinal Das ,  Anant Agarwal ,  John Palmour ,  Hudson Hobgood

发明人： Sei-Hyung Ryu ,  Jason Jenny ,  Mrinal Das ,  Anant Agarwal ,  John Palmour ,  Hudson Hobgood

IPC分类号： H01L31/0312

CPC分类号： H01L29/66068 ,  H01L29/0661 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/747 ,  H01L29/87 ,  H01L2924/10156

摘要： High voltage silicon carbide (SiC) devices, for example, thyristors, are provided. A first SiC layer having a first conductivity type is provided on a first surface of a voltage blocking SiC substrate having a second conductivity type. A first region of SiC is provided on the first SiC layer and has the second conductivity type. A second region of SiC is provided in the first SiC layer, has the first conductivity type and is adjacent to the first region of SiC. A second SiC layer having the first conductivity type is provided on a second surface of the voltage blocking SiC substrate. A third region of SiC is provided on the second SiC layer and has the second conductivity type. A fourth region of SiC is provided in the second SiC layer, has the first conductivity type and is adjacent to the third region of SiC. First and second contacts are provided on the first and third regions of SiC, respectively. Related methods of fabricating high voltage SiC devices are also provided.

摘要翻译： 提供高压碳化硅（SiC）器件，例如晶闸管。 具有第一导电类型的第一SiC层设置在具有第二导电类型的压电SiC衬底的第一表面上。 SiC的第一区域设置在第一SiC层上并具有第二导电类型。 SiC的第二区域设置在第一SiC层中，具有第一导电类型并且与SiC的第一区域相邻。 具有第一导电类型的第二SiC层设置在压电SiC衬底的第二表面上。 SiC的第三区域设置在第二SiC层上并具有第二导电类型。 SiC的第四区域设置在第二SiC层中，具有第一导电类型并且与SiC的第三区域相邻。 第一和第二触点分别设置在SiC的第一和第三区域上。 还提供了制造高电压SiC器件的相关方法。

公开(公告)号：US07135359B2

公开(公告)日：2006-11-14

申请号：US10845913

申请日：2004-05-14

申请人： Anant Agarwal ,  Sei-Hyung Ryu ,  John W. Palmour

发明人： Anant Agarwal ,  Sei-Hyung Ryu ,  John W. Palmour

IPC分类号： H01L21/332

CPC分类号： H01L31/1113 ,  Y10S438/931

摘要： Large area silicon carbide devices, such as light-activated silicon carbide thyristors, having only two terminals are provided. The silicon carbide devices are selectively connected in parallel by a connecting plate. Silicon carbide thyristors are also provided having a portion of the gate region of the silicon carbide thyristors exposed so as to allow light of an energy greater than about 3.25 eV to activate the gate of the thyristor. The silicon carbide thyristors may be symmetric or asymmetrical. A plurality of the silicon carbide thyristors may be formed on a wafer, a portion of a wafer or multiple wafers. Bad cells may be determined and the good cells selectively connected by a connecting plate.

摘要翻译： 提供仅具有两个端子的大面积碳化硅器件，例如光激活碳化硅晶闸管。 碳化硅器件通过连接板选择性地并联连接。 还提供了碳化硅晶闸管，其具有暴露的碳化硅晶闸管的栅极区域的一部分，以允许大于约3.25eV的能量的光来激活晶闸管的栅极。 碳化硅晶闸管可以是对称的或不对称的。 多个碳化硅晶闸管可以形成在晶片，晶片的一部分或多个晶片上。 可以确定坏细胞，并且通过连接板选择性地连接良好的细胞。

公开(公告)号：US20060054895A1

公开(公告)日：2006-03-16

申请号：US11268789

申请日：2005-11-08

申请人： Sei-Hyung Ryu ,  Anant Agarwal

发明人： Sei-Hyung Ryu ,  Anant Agarwal

IPC分类号： H01L31/0312

CPC分类号： H01L29/1608 ,  H01L29/0619

摘要： Edge termination for silicon carbide devices has a plurality of concentric floating guard rings in a silicon carbide layer that are adjacent and spaced apart from a silicon carbide-based semiconductor junction. An insulating layer, such as an oxide, is provided on the floating guard rings and a silicon carbide surface charge compensation region is provided between the floating guard rings and is adjacent the insulating layer. Methods of fabricating such edge termination are also provided.

摘要翻译： 用于碳化硅器件的边缘终端在碳化硅层中具有与碳化硅基半导体结相邻并间隔开的多个同心浮动保护环。 在浮动保护环上设置绝缘层，例如氧化物，并且在浮动保护环之间提供碳化硅表面电荷补偿区，并且与绝缘层相邻。 还提供了制造这种边缘终止的方法。

公开(公告)号：US09478616B2

公开(公告)日：2016-10-25

申请号：US13039441

申请日：2011-03-03

申请人： Sarit Dhar ,  Sei-Hyung Ryu ,  Lin Cheng ,  Anant Agarwal

发明人： Sarit Dhar ,  Sei-Hyung Ryu ,  Lin Cheng ,  Anant Agarwal

IPC分类号： H01L29/15 ,  H01L31/0312 ,  H01L29/10 ,  H01L21/225 ,  H01L29/16 ,  H01L29/66

CPC分类号： H01L29/107 ,  H01L21/225 ,  H01L29/1608 ,  H01L29/66068 ,  H01L29/66477 ,  H01L29/66568

摘要： Semiconductor devices having a high performance channel and method of fabrication thereof are disclosed. Preferably, the semiconductor devices are Metal-Oxide-Semiconductor (MOS) devices, and even more preferably the semiconductor devices are Silicon Carbide (SiC) MOS devices. In one embodiment, a semiconductor device includes a SiC substrate of a first conductivity type, a first well of a second conductivity type, a second well of the second conductivity type, and a surface diffused channel of the second conductivity type formed at the surface of semiconductor device between the first and second wells. A depth and doping concentration of the surface diffused channel are controlled to provide increased carrier mobility for the semiconductor device as compared to the same semiconductor device without the surface diffused channel region when in the on-state while retaining a turn-on, or threshold, voltage that provides normally-off behavior.

摘要翻译： 公开了具有高性能通道的半导体器件及其制造方法。 优选地，半导体器件是金属氧化物半导体（MOS）器件，并且甚至更优选半导体器件是碳化硅（SiC）MOS器件。 在一个实施例中，半导体器件包括第一导电类型的SiC衬底，第二导电类型的第一阱，第二导电类型的第二阱以及形成在第二导电类型的表面处的第二导电类型的表面扩散沟道 半导体器件在第一和第二阱之间。 控制表面扩散通道的深度和掺杂浓度，以便在处于导通状态同时保持导通状态或阈值时，与没有表面扩散沟道区的相同半导体器件相比，为半导体器件提供增加的载流子迁移率， 电压提供常态动作。

公开(公告)号：US09349596B2

公开(公告)日：2016-05-24

申请号：US12474720

申请日：2009-05-29

申请人： Anant Agarwal ,  Sei-Hyung Ryu ,  Matthew Donofrio

发明人： Anant Agarwal ,  Sei-Hyung Ryu ,  Matthew Donofrio

IPC分类号： H01L21/76 ,  H01L21/04 ,  H01L29/66 ,  H01L21/268

CPC分类号： H01L21/0485 ,  H01L21/0495 ,  H01L21/268 ,  H01L29/6606 ,  Y10S438/931

摘要： Methods of forming a silicon carbide semiconductor device are disclosed. The methods include forming a semiconductor device at a first surface of a silicon carbide substrate having a first thickness, and mounting a carrier substrate to the first surface of the silicon carbide substrate. The carrier substrate provides mechanical support to the silicon carbide substrate. The methods further include thinning the silicon carbide substrate to a thickness less the first thickness, forming a metal layer on the thinned silicon carbide substrate opposite the first surface of the silicon carbide substrate, and locally annealing the metal layer to form an ohmic contact on the thinned silicon carbide substrate opposite the first surface of the silicon carbide substrate. The silicon carbide substrate is singulated to provide a singulated semiconductor device.

公开(公告)号：US09029945B2

公开(公告)日：2015-05-12

申请号：US13102510

申请日：2011-05-06

申请人： Sei-Hyung Ryu ,  Doyle Craig Capell ,  Lin Cheng ,  Sarit Dhar ,  Charlotte Jonas ,  Anant Agarwal ,  John Palmour

发明人： Sei-Hyung Ryu ,  Doyle Craig Capell ,  Lin Cheng ,  Sarit Dhar ,  Charlotte Jonas ,  Anant Agarwal ,  John Palmour

IPC分类号： H01L29/66 ,  H01L29/15 ,  H01L31/0312 ,  H01L29/78 ,  H01L29/06 ,  H01L29/739 ,  H01L29/04 ,  H01L29/16

CPC分类号： H01L29/7802 ,  H01L29/045 ,  H01L29/0696 ,  H01L29/1608 ,  H01L29/7395

摘要： A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region. The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.

摘要翻译： 半导体器件包括具有第一导电类型的漂移层，漂移层中具有与第一导电类型相反的第二导电类型的阱区，以及阱区中的源极区。 源区具有第一导电类型并且在阱区中限定沟道区。 源极区域包括与沟道区域相邻的横向源极区域和远离与沟道区域相对的横向源极区域延伸的多个源极接触区域。 具有第二导电类型的体接触区域在多个源极接触区域中的至少两个之间并且与阱区域接触。 源欧姆触点与源极接触区域和身体接触区域中的至少一个重叠。 半导体器件的源极接触区域的最小尺寸由源极欧姆接触和至少一个源极接触区域之间的重叠区域限定。