中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

202 records (took 0.048 seconds)

    Fractional-readout oversampled image sensor
    22.
    发明授权
    Fractional-readout oversampled image sensor 有权
    分数读出过采样图像传感器

    公开(公告)号：US09521351B1

    公开(公告)日：2016-12-13

    申请号：US14995138

    申请日：2016-01-13

    Applicant: Rambus Inc.

    Inventor： Jay Endsley ,  Thomas Vogelsang ,  Craig M. Smith ,  Michael Guidash ,  Alexander C. Schneider

    IPC: H04N5/378 ,  H04N5/355 ,  H04N5/235 ,  H04N5/353

    CPC classification number: H04N5/378 ,  H04N5/2355 ,  H04N5/3532 ,  H04N5/35536

    Abstract: Signals representative of total photocharge integrated within respective image-sensor pixels are read out of the pixels after a first exposure interval that constitutes a first fraction of a frame interval. Signals in excess of a threshold level are read out of the pixels after an ensuing second exposure interval that constitutes a second fraction of the frame interval, leaving residual photocharge within the pixels. After a third exposure interval that constitutes a third fraction of the frame interval, signals representative of a combination of at least the residual photocharge and photocharge integrated within the pixels during the third exposure interval are read out of the pixels.

    Abstract translation: 在构成帧间隔的第一分数的第一曝光间隔之后，从像素中读出代表在相应图像传感器像素内的总光电荷的代表信号。 在构成帧间隔的第二部分的随后的第二曝光间隔之后，从像素中读出超过阈值电平的信号，在像素内留下残余光电荷。 在构成帧间隔的第三分数的第三曝光间隔之后，从像素中读出表示在第三曝光间隔期间集成在像素内的至少残留光电荷和光电荷的组合的信号。

    HIGH DYNAMIC-RANGE IMAGE SENSOR
    24.
    发明申请
    HIGH DYNAMIC-RANGE IMAGE SENSOR 审中-公开
    高动态范围图像传感器

    公开(公告)号：US20160323524A1

    公开(公告)日：2016-11-03

    申请号：US15100976

    申请日：2014-12-03

    Applicant: RAMBUS INC.

    Inventor： Craig M. Smith ,  Frank Armstrong ,  Jay Endsley ,  Thomas Vogelsang ,  James E. Harris ,  John Ladd ,  Michael Guidash

    IPC: H04N5/355 ,  H04N5/232 ,  H04N5/3745 ,  H04N5/347 ,  H04N5/361 ,  H04N9/04 ,  H04N5/235

    CPC classification number: H04N5/355 ,  H04N5/23245 ,  H04N5/2355 ,  H04N5/347 ,  H04N5/35536 ,  H04N5/361 ,  H04N5/37457 ,  H04N9/045

    Abstract: A pixel array within an integrated-circuit image sensor is exposed to light representative of a scene during a first frame interval and then oversampled a first number of times within the first frame interval to generate a corresponding first number of frames of image data from which a first output image may be constructed. One or more of the first number of frames of image data are evaluated to determine whether a range of luminances in the scene warrants adjustment of an oversampling factor from the first number to a second number, if so, the oversampling factor is adjusted such that the pixel array is oversampled the second number of times within a second frame interval to generate a corresponding second number of frames of image data from which a second output image may be constructed.

    Abstract translation: 集成电路图像传感器内的像素阵列在第一帧间隔期间暴露于表示场景的光，然后在第一帧间隔内对第一次数进行过采样，以生成对应的第一数量的图像数据帧， 可以构造第一输出图像。 对图像数据的第一数量帧中的一个或多个进行评估，以确定场景中的亮度范围是否需要将过采样因子从第一数量调整到第二数量，如果是，则调整过采样因子，使得 像素阵列在第二帧间隔内对第二次数进行过采样，以生成可以从其构造第二输出图像的图像数据的对应的第二数量帧。

    DRAM retention monitoring method for dynamic error correction
    25.
    发明授权
    DRAM retention monitoring method for dynamic error correction 有权
    用于动态纠错的DRAM保留监控方法

    公开(公告)号：US09411678B1

    公开(公告)日：2016-08-09

    申请号：US13828828

    申请日：2013-03-14

    Applicant: Rambus Inc.

    Inventor： Frederick A. Ware ,  Suresh Rajan ,  Ely Tsern ,  Thomas Vogelsang ,  Wayne Ellis

    IPC: H03M13/00 ,  G06F11/10

    CPC classification number: G06F11/1008

    Abstract: A method of operation in a memory device, comprising storing data in a first group of storage locations in the memory device, storing error information associated with the stored data in a second group of storage locations in the memory device, and selectively evaluating the error information based on a state of an error enable bit, the state based on whether a most recent access to the first group of storage locations involved a partial access.

    Abstract translation: 一种在存储器件中的操作方法，包括将数据存储在存储器件中的第一组存储位置中，将与存储的数据相关联的错误信息存储在存储器件中的第二组存储位置中，并且选择性地评估误差信息 基于错误使能位的状态，基于对第一组存储位置的最近访问是否涉及部分访问的状态。

    MEMORY REFRESH METHOD AND DEVICES
    26.
    发明申请
    MEMORY REFRESH METHOD AND DEVICES 有权
    存储器刷新方法和器件

    公开(公告)号：US20160217843A1

    公开(公告)日：2016-07-28

    申请号：US15046820

    申请日：2016-02-18

    Applicant: Rambus Inc.

    Inventor： Richard Perego ,  Thomas Vogelsang ,  John Brooks

    IPC: G11C11/406 ,  G11C11/408

    CPC classification number: G11C11/406 ,  G11C11/40603 ,  G11C11/40611 ,  G11C11/40618 ,  G11C11/408 ,  G11C2211/4061

    Abstract: The present disclosure describes DRAM architectures and refresh controllers that allow for scheduling of an opportunistic refresh of a DRAM device concurrently with normal row activate command directed toward the DRAM device. Each activate command affords an “opportunity” to refresh another independent row (i.e., a wordline) within a memory device with no scheduling conflict.

    Abstract translation: 本公开描述了DRAM架构和刷新控制器，其允许与指向DRAM设备的正常行激活命令同时调度DRAM设备的机会性刷新。 每个激活命令提供了在没有调度冲突的情况下刷新存储器设备内的另一独立行（即字线）的“机会”。

    Conditional-reset image sensor with analog counter array
    27.
    发明授权
    Conditional-reset image sensor with analog counter array 有权
    具有模拟计数器阵列的条件复位图像传感器

    公开(公告)号：US09380245B1

    公开(公告)日：2016-06-28

    申请号：US14173077

    申请日：2014-02-05

    Applicant: Rambus Inc.

    Inventor： Michael Guidash ,  Thomas Vogelsang

    IPC: H04N5/378 ,  H04N9/04

    CPC classification number: H04N5/378 ,  H04N5/355 ,  H04N5/3696 ,  H04N9/045

    Abstract: In an image sensor containing an array of pixels, a pixel signal corresponding to the state of a photosensitive element is read-out of each pixel and compared with a threshold. If the pixel signal exceeds the first threshold, the state of the photosensitive element is reset and an analog-count voltage that corresponds to the pixel is incremented.

    Abstract translation: 在包含像素阵列的图像传感器中，读出与每个像素相对应的感光元件的状态的像素信号并将其与阈值进行比较。 如果像素信号超过第一阈值，则光敏元件的状态被复位，并且对应于像素的模拟计数电压增加。

    DRAM SENSE AMPLIFIER THAT SUPPORTS LOW MEMORY-CELL CAPACITANCE
    29.
    发明申请
    DRAM SENSE AMPLIFIER THAT SUPPORTS LOW MEMORY-CELL CAPACITANCE 有权
    DRAM感应放大器，支持低存储容量

    公开(公告)号：US20150103605A1

    公开(公告)日：2015-04-16

    申请号：US14506507

    申请日：2014-10-03

    Applicant: Rambus Inc.

    Inventor： Thomas Vogelsang ,  Gary B. Bronner

    IPC: G11C11/4091 ,  G11C11/4096

    CPC classification number: G11C11/4091 ,  G11C7/065 ,  G11C7/08 ,  G11C11/4094 ,  G11C11/4096 ,  H01L27/10873 ,  H01L27/10897

    Abstract: The disclosed embodiments provide a sense amplifier for a dynamic random-access memory (DRAM). This sense amplifier includes a bit line to be coupled to a cell to be sensed in the DRAM, and a complement bit line which carries a complement of a signal on the bit line. The sense amplifier also includes a p-type field-effect transistor (PFET) pair comprising cross-coupled PFETs that selectively couple either the bit line or the complement bit line to a high bit-line voltage. The sense amplifier additionally includes an n-type field effect transistor (NFET) pair comprising cross-coupled NFETs that selectively couple either the bit line or the complement bit line to ground. This NFET pair is lightly doped to provide a low threshold-voltage mismatch between NFETs in the NFET pair. In one variation, the gate material for the NFETs is selected to have a work function that compensates for a negative threshold voltage in the NFETs which results from the light substrate doping. In another variation, the sense amplifier additionally includes a cross-coupled pair of latching NFETs. These latching NFETs are normally doped and are configured to latch the voltage on the bit line after the lightly doped NFETs finish sensing the voltage on the bit line.

    Abstract translation: 所公开的实施例提供用于动态随机存取存储器（DRAM）的读出放大器。 该读出放大器包括要耦合到要在DRAM中感测的单元的位线以及在位线上承载信号的补码的补码位线。 读出放大器还包括p型场效应晶体管（PFET）对，其包括选择性地将位线或补码位线耦合到高位线电压的交叉耦合PFET。 读出放大器另外包括n型场效应晶体管（NFET）对，其包括交叉耦合NFET，其选择性地将位线或补码位线耦合到地。 该NFET对被轻掺杂以在NFET对中的NFET之间提供低阈值电压失配。 在一个实施例中，用于NFET的栅极材料被选择为具有补偿由于衬底掺杂导致的NFET中的负阈值电压的功函数。 在另一变型中，读出放大器另外包括交叉耦合的一对锁存NFET。 这些锁存NFET通常是掺杂的，并且被配置为在轻掺杂NFET完成感测位线上的电压之后锁存位线上的电压。

    Oversampled image sensor with conditional pixel readout
    30.
    发明授权
    Oversampled image sensor with conditional pixel readout 有权
    具有条件像素读数的过采样图像传感器

    公开(公告)号：US09001251B2

    公开(公告)日：2015-04-07

    申请号：US14482065

    申请日：2014-09-10

    Applicant: Rambus Inc.

    Inventor： Craig M. Smith ,  Michael Guidash ,  Jay Endsley ,  Thomas Vogelsang ,  James E. Harris

    IPC: H04N3/14 ,  H04N5/335 ,  H04N5/378 ,  H01L31/062 ,  H01L31/113

    CPC classification number: H04N5/3559 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14641 ,  H01L27/14643 ,  H01L27/14645 ,  H04N5/347 ,  H04N5/355 ,  H04N5/3741 ,  H04N5/37455 ,  H04N5/378

    Abstract: In a pixel array within an integrated-circuit image sensor, each of a plurality of pixels is evaluated to determine whether charge integrated within the pixel in response to incident light exceeds a first threshold. N-bit digital samples corresponding to the charge integrated within at least a subset of the plurality of pixels are generated, and then applied to a lookup table to retrieve respective M-bit digital values (M being less than N), wherein a stepwise range of charge integration levels represented by possible states of the M-bit digital values extends upward from a starting charge integration level that is determined based on the first threshold.

    Abstract translation: 在集成电路图像传感器内的像素阵列中，评估多个像素中的每一个以确定响应于入射光在像素内积分的电荷是否超过第一阈值。 产生与集成在多个像素的至少一个子集中的电荷相对应的N位数字样本，然后将其应用于查找表以检索相应的M位数字值（M小于N），其中步长范围 由M位数字值的可能状态表示的电荷积分电平从基于第一阈值确定的起始电荷积分电平向上延伸。

Patent Agency Ranking