公开(公告)号：US10527872B2

公开(公告)日：2020-01-07

申请号：US15798780

申请日：2017-10-31

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Hiroyuki Kunishima ,  Yasutaka Nakashiba ,  Masaru Wakabayashi ,  Shinichi Watanuki

IPC: G02B6/26 ,  G02F1/025 ,  H01L23/532 ,  G02B6/125 ,  G02B6/132 ,  G02B6/28 ,  G02B6/12

Abstract: A low reflectance film with a second reflectance (50% or lower) lower than a first reflectance is formed between an optical directional coupler and a first-layer wiring with the first reflectance. Thus, even when the first-layer wiring is formed above the optical directional coupler, the influence of the light reflected by the first-layer wiring on the optical signal propagating through the first optical waveguide and the second optical waveguide of the optical directional coupler can be reduced. Accordingly, the first-layer wiring can be arranged above the optical directional coupler, and the restriction on the layout of the first-layer wiring is relaxed.

公开(公告)号：US10416481B2

公开(公告)日：2019-09-17

申请号：US16182259

申请日：2018-11-06

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Tohru Kawai ,  Shinichi Watanuki ,  Yasutaka Nakashiba

IPC: G02F1/025

Abstract: The performances of a semiconductor device are improved. The semiconductor device includes an insulation layer, an optical waveguide part formed over the insulation layer, and including a p type semiconductor region and an n type semiconductor region formed therein, and an interlayer insulation film formed over the insulation layer in such a manner as to cover the optical waveguide part. At the first portion of the optical waveguide part, in a cross sectional view perpendicular to the direction of extension of the optical waveguide part, the n type semiconductor region is arranged at the central part of the optical waveguide part, and the p type semiconductor region is arranged in such a manner as to surround the entire circumference of the n type semiconductor region.

公开(公告)号：US10416382B2

公开(公告)日：2019-09-17

申请号：US16176327

申请日：2018-10-31

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Yasutaka Nakashiba ,  Shinichi Watanuki

IPC: G02B6/10 ,  G02B6/122 ,  G02B6/12

Abstract: In an optical waveguide section of an SIS type having a configuration of stacking a second semiconductor layer over a first semiconductor layer with a dielectric layer interposed, the first semiconductor layer is electrically coupled to a first electrode at a first lead-out section where the second semiconductor layer is not stacked. Further, the second semiconductor layer is electrically coupled to a second electrode at a second lead-out section not overlapping with the first semiconductor layer. As a result, when a contact hole for forming the second electrode is formed by dry etching, the dielectric layer between the first semiconductor layer and the second semiconductor layer is not damaged or broken and hence short-circuit failure between the first semiconductor layer and the second semiconductor layer can be prevented. The reliability of the optical waveguide section therefore can be improved.

公开(公告)号：US10197822B2

公开(公告)日：2019-02-05

申请号：US15878619

申请日：2018-01-24

Applicant: Renesas Electronics Corporation

Inventor： Shinichi Kuwabara ,  Yasutaka Nakashiba ,  Tetsuya Iida ,  Shinichi Watanuki

IPC: G02F1/025 ,  H01L21/02 ,  H01L29/06 ,  H01L29/16 ,  H01L21/3065 ,  H01L21/311 ,  G02F1/015

Abstract: To reduce a production cost of a semiconductor device and provide a semiconductor device having improved characteristics. A grating coupler has a plurality of projections separated from each other in an optical waveguide direction and a slab portion formed between any two of the projections adjacent to each other and formed integrally with them; a MOS optical modulator has a projection extending in the optical waveguide direction and slab portions formed on both sides of the projection, respectively, and formed integrally therewith. The projection of the grating coupler and the MOS optical modulator is formed of a first semiconductor layer, a second insulating layer, and a second semiconductor layer stacked successively on a first insulating layer, while the grating coupler and the MOS optical modulator each have a slab portion formed of the first semiconductor layer.

公开(公告)号：US10162110B2

公开(公告)日：2018-12-25

申请号：US15243718

申请日：2016-08-22

Applicant: Renesas Electronics Corporation ,  Photonics Electronics Technology Research Association

Inventor： Tatsuya Usami ,  Keiji Sakamoto ,  Yoshiaki Yamamoto ,  Shinichi Watanuki ,  Masaru Wakabayashi ,  Tohru Mogami ,  Tsuyoshi Horikawa ,  Keizo Kinoshita

IPC: G02B6/12 ,  G02B6/132 ,  G02B6/136

Abstract: A semiconductor device is provided with an insulating layer formed on a base substrate, an optical waveguide composed of a semiconductor layer formed on the insulating layer, and an insulating film formed along an upper surface of the insulating layer and a front surface of the optical waveguide. A peripheral edge portion of a lower surface of the optical waveguide is separated from the insulating layer, and the insulating film is buried between the peripheral edge portion and the insulating layer.

公开(公告)号：US10078182B2

公开(公告)日：2018-09-18

申请号：US15243746

申请日：2016-08-22

Applicant: Renesas Electronics Corporation ,  Photonics Electronics Technology Research Association

Inventor： Shinichi Watanuki ,  Akira Mitsuiki ,  Atsuro Inada ,  Tohru Mogami ,  Tsuyoshi Horikawa ,  Keizo Kinoshita

IPC: G02B6/12 ,  G02B6/136 ,  G02B6/122 ,  G02F1/025

CPC classification number: G02B6/136 ,  G02B6/12004 ,  G02B6/122 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02F1/025 ,  G02F2201/063 ,  G02F2201/066 ,  G02F2202/105

Abstract: When an optical waveguide is formed, an area of an opening of a resist mask is equal to an area of a semiconductor layer for a dummy pattern exposed from the resist mask, and the semiconductor layer for the dummy pattern exposed from the resist mask has a uniform thickness in a region in which the dummy pattern is formed. As a result, an effective pattern density does not change in etching the semiconductor layer for the dummy pattern, and accordingly, it is possible to form a rib-shaped optical waveguide having desired dimensions and a desired shape.

公开(公告)号：US09977186B2

公开(公告)日：2018-05-22

申请号：US15186610

申请日：2016-06-20

Applicant: Renesas Electronics Corporation

Inventor： Yasutaka Nakashiba ,  Shinichi Watanuki

IPC: G02B6/12 ,  G02B6/122 ,  G02B6/124 ,  G02F1/025 ,  G02B6/136 ,  G02B6/34

CPC classification number: G02B6/122 ,  G02B6/136 ,  G02B6/34 ,  G02B2006/12038 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/12107 ,  G02F1/025

Abstract: A semiconductor device including an optical waveguide and a p-type semiconductor portion is configured as follows. The optical waveguide includes: a first semiconductor layer formed on an insulating layer; an insulating layer formed on the first semiconductor layer; and a second semiconductor layer formed on the insulating layer. The p-type semiconductor portion includes the first semiconductor layer. The film thickness of the p-type semiconductor portion is smaller than that of the optical waveguide. By forming the insulating layer between the first semiconductor layer and the second semiconductor layer, control of the film thicknesses of the optical waveguide and the p-type semiconductor portion is facilitated. Specifically, when the unnecessary second semiconductor layer is removed by etching in a step of forming the p-type semiconductor portion, the insulating layer which is the lower layer functions as an etching stopper, and the film thickness of the p-type semiconductor portion can be easily adjusted.

公开(公告)号：US09927573B2

公开(公告)日：2018-03-27

申请号：US15188914

申请日：2016-06-21

Applicant: Renesas Electronics Corporation

Inventor： Yasutaka Nakashiba ,  Shinichi Watanuki

IPC: G02B6/122 ,  G02B6/12 ,  G02B6/132 ,  G02F1/025 ,  G02F1/015 ,  H01L31/0248

CPC classification number: G02B6/122 ,  G02B6/12004 ,  G02B6/132 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02F1/025 ,  G02F2001/0152 ,  G02F2202/103 ,  G02F2202/104 ,  H01L31/0248

Abstract: An SOI substrate includes a base substrate, a polycrystalline silicon layer formed on the base substrate, an insulating layer formed on the polycrystalline silicon layer, and a semiconductor layer formed on the insulating layer, and optical waveguides are formed in the semiconductor layer of the SOI substrate. Thus, by arranging the polycrystalline silicon layer under the insulating layer, the insulating layer can be made thin. Since the polycrystalline silicon layer includes a plurality of grains (a mass of grains made of a single crystal Si), even when leakage of light is generated beyond the insulating layer, reflection (diffusion) of light can be suppressed. In addition, by arranging the polycrystalline silicon layer under the insulating layer, the insulating layer can be made thin, so that distortion of a substrate can be suppressed.

公开(公告)号：US09696489B2

公开(公告)日：2017-07-04

申请号：US15062153

申请日：2016-03-06

Applicant: Renesas Electronics Corporation

Inventor： Shinichi Watanuki ,  Atsuro Inada

IPC: G02B6/122 ,  G02F1/025 ,  G02B6/136

CPC classification number: H01L31/18 ,  G02B6/122 ,  G02B6/1223 ,  G02B6/13 ,  G02B6/136 ,  G02F1/025 ,  H01L31/02325

Abstract: A semiconductor substrate, an insulating layer made of silicon oxide formed on the semiconductor substrate and a semiconductor layer made of silicon formed on the insulating layer are provided, and the semiconductor layer constitutes an optical waveguide in an optical signal transmission line section and an optical modulator in an optical modulation section. Also, the insulating layer is removed except for a part thereof to have a hollow structure with a cavity, and both side surfaces and a lower surface of each of the semiconductor layers constituting the optical waveguide and the optical modulator are exposed and covered with air.