公开(公告)号：US20210118818A1

公开(公告)日：2021-04-22

申请号：US17137262

申请日：2020-12-29

Applicant: STMICROELECTRONICS, INC.

Inventor： Aaron Cadag ,  Lester Joseph Belalo ,  Ela Mia Cadag

IPC: H01L23/00 ,  H01L23/495 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56 ,  H01L21/78

Abstract: A semiconductor package formed utilizing multiple etching steps includes a lead frame, a die, and a molding compound. The lead frame includes leads and a die pad. The leads and the die pad are formed from a first conductive material by the multiple etching steps. More specifically, the leads and the die pad of the lead frame are formed by at least three etching steps. The at least three etching steps including a first etching step, a second undercut etching step, and a third backside etching step. The second undercut etching step forming interlocking portions at an end of each lead. The end of the lead is encased in the molding compound. This encasement of the end of the lead with the interlocking portion allows the interlocking portion to mechanically interlock with the molding compound to avoid lead pull out. In addition, by utilizing at least three etching steps the leads can be formed to have a height that is greater than the die pad of the lead frame. This differential in height reduces the span of wires used to form electrical connections within the semiconductor package. These reductions in the span of the wires reduces the chances of wire to wire and wire to die short circuiting because the wire sweep of the wires is reduced when the molding compound is placed.

公开(公告)号：US10461019B2

公开(公告)日：2019-10-29

申请号：US16136709

申请日：2018-09-20

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Ian Harvey Arellano ,  Ela Mia Cadag

IPC: H01L21/44 ,  H01L23/495 ,  H01L23/00 ,  H01L21/78 ,  H01L21/56 ,  H01L23/31 ,  H01L23/544

Abstract: A semiconductor package formed utilizing a removable backside protective layer includes a leadframe, a die pad, leads and a molding compound around them. The first surface of the die pad and leads are exposed to an external environment by the plurality of recesses. The recesses are formed by coupling a removable backside protective layer to the leadframe before applying the molding compound. After the molding compound is applied and cured, the backside protective layer is removed to expose the first surface of the die pad and the first surfaces of the leads so the semiconductor package may be mounted within an electronic device. The removable backside protective layer protects the die pad and the leads from mold flashing and residue when forming the semiconductor package during the fabrication process.

公开(公告)号：US20190043790A1

公开(公告)日：2019-02-07

申请号：US16154538

申请日：2018-10-08

Applicant: STMicroelectronics, Inc.

Inventor： Rennier Rodriguez ,  Aiza Marie Agudon ,  Jefferson Talledo ,  Moonlord Manalo ,  Ela Mia Cadag ,  Rammil Seguido

IPC: H01L23/495 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31

Abstract: The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.

公开(公告)号：US10128169B1

公开(公告)日：2018-11-13

申请号：US15594351

申请日：2017-05-12

Applicant: STMicroelectronics, Inc.

Inventor： Aaron Cadag ,  Ian Harvey Arellano ,  Ela Mia Cadag

IPC: H01L21/44 ,  H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L23/49513 ,  H01L21/565 ,  H01L21/568 ,  H01L21/6836 ,  H01L21/78 ,  H01L23/3114 ,  H01L23/315 ,  H01L23/4952 ,  H01L23/49541 ,  H01L24/32 ,  H01L24/49 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L2221/68381 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/83005 ,  H01L2224/92247

Abstract: A semiconductor package formed utilizing a removable backside protective layer includes a leadframe, a die pad, leads and a molding compound around them. The first surface of the die pad and leads are exposed to an external environment by the plurality of recesses. The recesses are formed by coupling a removable backside protective layer to the leadframe before applying the molding compound. After the molding compound is applied and cured, the backside protective layer is removed to expose the first surface of the die pad and the first surfaces of the leads so the semiconductor package may be mounted within an electronic device. The removable backside protective layer protects the die pad and the leads from mold flashing and residue when forming the semiconductor package during the fabrication process.

公开(公告)号：US09818675B2

公开(公告)日：2017-11-14

申请号：US14674069

申请日：2015-03-31

Applicant: STMICROELECTRONICS, INC.

Inventor： Jefferson Talledo ,  Ela Mia Cadag

IPC: H01L23/495 ,  H01L23/31

CPC classification number: H01L23/49513 ,  H01L23/3107 ,  H01L23/49524 ,  H01L23/49555 ,  H01L23/49562 ,  H01L2224/37599 ,  H01L2224/40 ,  H01L2224/83801 ,  H01L2224/84801 ,  H01L2224/8484 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/37099

Abstract: An integrated circuit (IC) device may include a leadframe and an IC die having a first surface coupled to the lead frame and a second surface opposite the first surface. The IC device may further include a conductive clip including a first portion coupled to the second surface of the IC die, a second portion coupled to the first portion and extending laterally away from the IC die, and at least one flexible lead coupled to the second portion and looping back under the second portion toward the leadframe. Furthermore, a package may be over the leadframe, IC die, and conductive clip and have an opening therein exposing the at least one flexible lead.

公开(公告)号：US09165867B1

公开(公告)日：2015-10-20

申请号：US14449492

申请日：2014-08-01

Applicant: STMICROELECTRONICS, INC.

Inventor： Ela Mia Cadag ,  Jefferson Talledo

IPC: H01L23/495 ,  H01L23/28 ,  H01L23/00

CPC classification number: H01L23/49541 ,  H01L21/4832 ,  H01L23/28 ,  H01L23/3121 ,  H01L23/49513 ,  H01L24/17 ,  H01L24/29 ,  H01L24/32 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/81 ,  H01L2224/05599 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor device may include an integrated circuit (IC), and lead frame contact areas adjacent the IC. Each lead frame contact area may have an opening therein. The semiconductor device may include bond wires, each bond wire coupling a respective lead frame contact area with the IC. The semiconductor device may also include encapsulation material surrounding the IC, the lead frame contact areas, and the bond wires. Solder balls are within the respective opening.

Abstract translation: 半导体器件可以包括集成电路（IC）和与IC相邻的引线框接触区域。 每个引线框架接触区域可以在其中具有开口。 半导体器件可以包括接合线，每个接合线将相应的引线框架接触区域与IC耦合。 半导体器件还可以包括围绕IC的封装材料，引线框架接触区域和接合线。 焊球在相应的开口内。