公开(公告)号：US20200073051A1

公开(公告)日：2020-03-05

申请号：US16549843

申请日：2019-08-23

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Alps) SAS

Inventor： Charles Baudot ,  Sylvain Guerber ,  Patrick Le Maitre

IPC: G02B6/125

Abstract: In one embodiment, a waveguide includes an upstream portion, a downstream portion, and an intermediate portion between the upstream portion and the downstream portion. A first band is disposed on an insulating layer, the first band oriented along a first direction. A first lateral strip and a second lateral strip are disposed on either side of the first band, the first lateral strip and the second lateral strip being thinner or interrupted along the intermediate portion.

公开(公告)号：US10359652B2

公开(公告)日：2019-07-23

申请号：US15868642

申请日：2018-01-11

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Charles Baudot ,  Maurin Douix ,  Frederic Boeuf ,  Sébastien Cremer

IPC: G02F1/035 ,  G02F1/025 ,  G02F1/015

Abstract: An E/O phase modulator may include a waveguide having an insulating substrate, a single-crystal silicon strip and a polysilicon strip of a same thickness and doped with opposite conductivity types above the insulating substrate, and an insulating interface layer between the single-crystal silicon strip and polysilicon strip. Each of the single-crystal silicon strip and polysilicon strip may be laterally continued by a respective extension, and a respective electrical contact coupled to each extension.

公开(公告)号：US20180329140A1

公开(公告)日：2018-11-15

申请号：US16029365

申请日：2018-07-06

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Frédéric Boeuf ,  Charles Baudot

IPC: G02B6/12 ,  H01L25/04 ,  H01L21/768 ,  H01L23/48 ,  H01L23/00 ,  H02S40/44

CPC classification number: G02B6/12004 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/13 ,  H01L24/14 ,  H01L25/043 ,  H01L2924/00014 ,  H01L2924/10252 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H02S40/44 ,  H01L2224/13099

Abstract: A method for making an electro-optic device includes forming a first photonic device having a first material in a first photonic layer over a substrate layer. A second photonic layer with a second photonic device is formed over the first photonic layer and includes a second material different than the first material. A dielectric layer is formed over the second photonic layer. A first electrically conductive via extending through the dielectric layer and the second photonic layer is formed so as to couple to the first photonic device. A second electrically conductive via extending through the dielectric layer and coupling to the second photonic device is formed. A third electrically conductive via extending through the dielectric layer, the second photonic layer, and the first photonic layer is formed so as to couple to the substrate layer.

公开(公告)号：US20180003895A1

公开(公告)日：2018-01-04

申请号：US15367901

申请日：2016-12-02

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Charles Baudot

IPC: G02B6/125 ,  G02B6/122 ,  G02B6/136 ,  G02B6/12

CPC classification number: G02B6/125 ,  G02B6/1228 ,  G02B6/136 ,  G02B2006/12061 ,  G02B2006/12097 ,  G02B2006/121 ,  G02B2006/12173 ,  G02B2006/12176

Abstract: A photonic integrated device includes a first waveguide and a second waveguide. The first and second waveguides are mutually coupled at a junction region the includes a bulge region.

公开(公告)号：US12019293B2

公开(公告)日：2024-06-25

申请号：US17932623

申请日：2022-09-15

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Jean-Francois Carpentier ,  Charles Baudot

IPC: G02B6/43 ,  G02B6/12 ,  G02B6/13 ,  G02B6/42

CPC classification number: G02B6/43 ,  G02B6/12004 ,  G02B6/13 ,  G02B6/4234 ,  G02B2006/12061

Abstract: A photonic system includes a first photonic circuit having a first face and a second photonic circuit having a second face. The first photonic circuit comprises first wave guides, and, for each first wave guide, a second wave guide covering the first wave guide, the second wave guides being in contact with the first face and placed between the first face and the second face, the first wave guides being located on the side of the first face opposite the second wave guides. The second photonic circuit comprises, for each second wave guide, a third wave guide covering the second wave guide. The first photonic circuit comprises first positioning devices projecting from the first face and the second photonic circuit comprises second positioning devices projecting from the second face, at least one of the first positioning devices abutting one of the second positioning devices in a first direction.

公开(公告)号：US11145779B2

公开(公告)日：2021-10-12

申请号：US16294645

申请日：2019-03-06

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Charles Baudot ,  Sebastien Cremer ,  Nathalie Vulliet ,  Denis Pellissier-Tanon

IPC: H01L27/092 ,  H01L29/16 ,  H01L29/04 ,  H01L29/20 ,  H01L31/109 ,  H01L31/18 ,  H01L31/0232 ,  H01L31/028 ,  H01L31/105

Abstract: A photodiode includes an active area formed by intrinsic germanium. The active area is located within a cavity formed in a silicon layer. The cavity is defined by opposed side walls which are angled relative to a direction perpendicular to a bottom surface of the silicon layer. The angled side walls support epitaxial growth of the intrinsic germanium with minimal lattice defects.

公开(公告)号：US10705294B2

公开(公告)日：2020-07-07

申请号：US16295553

申请日：2019-03-07

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Sylvain Guerber ,  Charles Baudot

IPC: G02B6/24 ,  G02B6/122 ,  G02B6/12 ,  G02B6/42

Abstract: An optical waveguide termination device includes a waveguide and metal vias surrounding an end portion of the waveguide. The end portion of the waveguide has a transverse cross-sectional area that decreases towards its distal end. The metal vias are orthogonal to a same plane, with the same plane being orthogonal to the transverse cross-section. The metal vias absorb light originating from the end portion when a light signal propagates through the waveguide, and the metal vias and the end portion provide that an effective index of an optical mode to be propagated through the waveguide progressively varies in the end portion. Additional metal vias may be present along the waveguide upstream of the end portion, with the additional metal vias bordering the waveguide upstream of the end portion providing that the effective index of an optical mode to be propagated through the waveguide varies progressively toward the end portion.

公开(公告)号：US10451802B2

公开(公告)日：2019-10-22

申请号：US16374214

申请日：2019-04-03

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Charles Baudot

IPC: G02B6/125 ,  G02B6/122 ,  G02B6/136 ,  G02B6/12

Abstract: A photonic integrated device includes a first waveguide and a second waveguide. The first and second waveguides are mutually coupled at a junction region which includes a bulge region. The bulge region is defined two successive etching operations using two distinct etch masks, where the first etching operation is a partial etch and the second etching operation is a complete etch.

公开(公告)号：US10139563B2

公开(公告)日：2018-11-27

申请号：US14984563

申请日：2015-12-30

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Charles Baudot ,  Alain Chantre ,  Sébastien Cremer

IPC: G02B6/34 ,  G02B6/122 ,  G02B6/136 ,  G02B6/132 ,  G02B6/42 ,  G02B6/12

Abstract: A method is for making a photonic chip including EO devices having multiple thicknesses. The method may include forming a first semiconductor layer over a semiconductor film, forming a second semiconductor layer over the first semiconductor layer, and forming a mask layer over the second semiconductor layer. The method may include performing a first selective etching of the mask layer to provide initial alignment trenches, performing a second etching, aligned with some of the initial alignment trenches and using the first semiconductor layer as an etch stop, to provide multi-level trenches, and filling the multi-level trenches to make the EO devices having multiple thicknesses.

公开(公告)号：US10073219B2

公开(公告)日：2018-09-11

申请号：US15051904

申请日：2016-02-24

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Charles Baudot

IPC: G02B6/12 ,  H01L21/763 ,  G02B6/122 ,  G02F1/025

CPC classification number: G02B6/122 ,  G02B6/12004 ,  G02B2006/12097 ,  G02B2006/121 ,  G02F1/025

Abstract: An integrated circuit includes an active device for confinement of a light flux that is formed in a semiconducting substrate. A confinement rib is separated from two doped zones by two trenches. Each doped zone includes a contacting zone on an upper face. Each trench widens from a bottom wall towards the upper face of the corresponding doped zone. The widening trenches present a sidewall having a tiered profile between the trench and the doped zone. An opposite sidewall presents a straight profile.