公开(公告)号：US11017720B2

公开(公告)日：2021-05-25

申请号：US16709309

申请日：2019-12-10

Applicant: Samsung Display Co., Ltd.

Inventor： Chong Chui Chai ,  Dong Woo Kim ,  Kyoung Ju Shin ,  Bo Yong Chung

IPC: G09G3/3233 ,  H01L29/786 ,  G09G3/3266 ,  G09G3/3275 ,  H01L27/12 ,  G09G3/36

Abstract: A pixel includes a plurality of transistors, a storage capacitor, and an organic light emitting diode. A first transistor controls the amount of current from a first driving power source to the organic light emitting diode based on a data voltage. A second transistor is connected to a data line and is turned on based on a scan signal. A third transistor coupled to the first transistor and is turned on based on the scan signal. A first stabilizing transistor is coupled to the third transistor or between the first and third transistors and is turned off when the third transistor is turned off.

公开(公告)号：US10977997B2

公开(公告)日：2021-04-13

申请号：US16155854

申请日：2018-10-09

Applicant: Samsung Display Co., Ltd.

Inventor： Ji Tae Kim ,  Kyoung Ju Shin

IPC: G09G3/3241 ,  G09G3/3266 ,  G09G3/3275

Abstract: A pixel includes an organic light emitting diode, a first transistor, a second transistor, and a third transistor. The first transistor includes a first electrode, a second electrode, and a gate electrode and may control a current applied to the organic light emitting diode from a first power source, wherein the gate electrode is electrically connected to a first node. The second transistor is electrically connected between the organic light emitting diode and the second electrode of the first transistor and may turn on in response to a first emission control signal. The third transistor is electrically connected between the first power source and the first electrode of the first transistor and may turn on in response to a second emission control signal. The second transistor may turn on two or more times during one frame. The third transistor may turn on exactly once in the one frame.

公开(公告)号：US10121434B2

公开(公告)日：2018-11-06

申请号：US15042029

申请日：2016-02-11

Applicant: Samsung Display Co., Ltd

Inventor： Jun Hyun Park ,  Sung Hwan Kim ,  Se Young Song ,  Kyoung Ju Shin ,  Jae Keun Lim

IPC: G11C19/00 ,  G09G3/36 ,  G09G3/20 ,  G11C19/28 ,  H03K17/687

Abstract: There is provided a stage circuit capable of minimizing a mounting area. The stage circuit includes: an output unit configured to supply a voltage of a first node, an i-th (i is a natural number) carry signal, and to supply an i-th scan signal in response to the voltage of the first node, a voltage of a second node, and a first clock signal, a controller configured to control the voltage of the second node in response to the first clock signal; a pull-up unit configured to control the voltage of the first node in response to a carry signal of a previous stage and a voltage of a first node of the previous stage, and a pull-down unit configured to control the voltage of the first node in response to the voltage of the second node and a carry signal of a next stage.

公开(公告)号：US10079598B2

公开(公告)日：2018-09-18

申请号：US15048979

申请日：2016-02-19

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun Park ,  Sung Hwan Kim ,  Se Young Song ,  Kyoung Ju Shin

IPC: G11C19/28 ,  G09G3/20 ,  G11C19/18 ,  H03K17/687

CPC classification number: H03K17/6871 ,  G09G3/20 ,  G09G2310/0267 ,  G09G2310/0286 ,  G11C19/184 ,  G11C19/28

Abstract: A gate driving circuit includes: a plurality of stages configured to output a plurality of gate signals, wherein an Nth stage of the plurality of stages includes: an output pull-up unit including a control electrode connected to a first node, wherein the output pull-up unit is configured to increase an electric potential at the first node and is further configured to receive a clock signal and to output a gate signal of the Nth stage; a control node pull-up unit configured to charge the first node according to an (N−1)th control signal and an (N−2)th control signal; a control node pull-down unit configured to discharge a voltage of the first node as a first low voltage according to an (N+1)th control signal; and an output pull-down unit configured to discharge a gate signal of the Nth stage as the first low voltage according to the (N+1)th control signal.

公开(公告)号：US09977271B2

公开(公告)日：2018-05-22

申请号：US15000633

申请日：2016-01-19

Applicant: Samsung Display Co., Ltd.

Inventor： Kyoung Ju Shin ,  Sung Hwan Kim ,  Se Young Song

IPC: G02F1/1333 ,  G02F1/1368 ,  G02F1/1343 ,  G02F1/1362 ,  G02F1/1335

CPC classification number: G02F1/133345 ,  G02F1/133512 ,  G02F1/134309 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136213 ,  G02F1/136227 ,  G02F1/1368 ,  G02F2001/134372

Abstract: A liquid crystal display including: a first substrate; a gate line and a data line formed or otherwise disposed on the first substrate; a drain electrode disposed on the first substrate; a first insulating layer disposed on the gate line and the data line; a first electrode disposed on the first insulating layer; a second insulating layer disposed on the first electrode; and a second electrode disposed on the second insulating layer. The first insulating layer and the second insulating layer have a first contact hole exposing a portion of the drain electrode. The contact portion of the second electrode is connected to the drain electrode through the first contact hole, and the contact portion overlaps the first electrode adjacent the first contact hole. The overlap increases capacitance of the display panel so as to decrease kickback voltage and reduce flicker.

公开(公告)号：US09647079B2

公开(公告)日：2017-05-09

申请号：US15069239

申请日：2016-03-14

Applicant: Samsung Display Co., Ltd.

Inventor： Jun Hyun Park ,  Kyoung Ju Shin

IPC: H01L33/00 ,  H01L29/423 ,  H01L29/786 ,  H01L27/12

CPC classification number: H01L29/42384 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/1244 ,  H01L27/1248 ,  H01L27/1288 ,  H01L29/78669 ,  H01L29/78678 ,  H01L29/7869 ,  H01L2029/42388

Abstract: Disclosed herein is a thin film transistor array panel, including: an insulating substrate; a gate electrode formed on the insulating substrate; a gate insulating layer formed on the gate electrode; a semiconductor layer formed on the gate insulating layer; a source electrode and a drain electrode formed on the semiconductor layer and the gate insulating layer and facing each other; and a pixel electrode connected to the drain electrode and applied with a voltage from the drain electrode, wherein a thickness of the gate insulating layer which overlaps the drain electrode but does not overlap the semiconductor layer is formed to be thinner than that which overlaps the semiconductor.

公开(公告)号：US20170069282A1

公开(公告)日：2017-03-09

申请号：US15135425

申请日：2016-04-21

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun Hyun Park ,  Keum Nam Kim ,  Sung Hwan Kim ,  Kyoung Ju Shin

IPC: G09G3/36

CPC classification number: G09G3/3677 ,  G09G3/3614 ,  G09G3/3648 ,  G09G2230/00 ,  G09G2310/0216 ,  G09G2310/0224 ,  G09G2310/0251 ,  G09G2310/0286 ,  G11C19/287

Abstract: A scan driver includes a plurality of stages configured to supply scan signals to scan lines. An ith (i is a natural number) stage of the stages at one side of a panel includes: a first transistor connected between a first input terminal and a first node, and including a gate electrode connected to a second input terminal; a second transistor connected between a third input terminal and a first output terminal for outputting an ith scan signal of the scan signals, and including a gate electrode connected to the first node; a third transistor connected between the first output terminal and a first power input terminal configured to receive a first off voltage, and including a gate electrode connected to the second input terminal; and a first capacitor connected between the first node and the first output terminal.

Abstract translation: 扫描驱动器包括被配置为向扫描线提供扫描信号的多个级。 在面板一侧的第i（i是自然数）阶段包括：连接在第一输入端和第一节点之间的第一晶体管，并且包括连接到第二输入端的栅电极; 连接在第三输入端子和第一输出端子之间的第二晶体管，用于输出扫描信号的第i扫描信号，并且包括连接到第一节点的栅电极; 连接在第一输出端子和被配置为接收第一截止电压的第一电力输入端子之间的第三晶体管，并且包括连接到第二输入端子的栅电极; 以及连接在第一节点和第一输出端子之间的第一电容器。