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    Semiconductor memory devices and methods of manufacturing the same
    21.
    发明授权
    Semiconductor memory devices and methods of manufacturing the same 有权
    半导体存储器件及其制造方法

    公开(公告)号：US09111619B2

    公开(公告)日：2015-08-18

    申请号：US13652849

    申请日：2012-10-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chang-Hyun Lee ,  Jung-Dal Choi ,  Do-Hyun Lee

    IPC: G11C11/34 ,  G11C16/06 ,  H01L29/788 ,  H01L29/792 ,  H01L27/115 ,  G11C16/34

    CPC classification number: G11C16/06 ,  G11C16/3418 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11565 ,  H01L27/1157 ,  H01L29/7881 ,  H01L29/792

    Abstract: A semiconductor device includes a bit line, a first cell string and a second cell string. The first cell string includes a first selecting transistor connected to the bit line in series and having a threshold voltage greater than a first reference voltage, a second selecting transistor having a threshold voltage smaller than a second reference voltage, cell transistors and a ground selecting transistor. The second cell string includes a third selecting transistor connected to the bit line in series and having a threshold voltage smaller than the first reference voltage, a fourth selecting transistor having a threshold voltage greater than the second reference voltage, cell transistors and a ground selecting transistor. A channel region of the first selecting transistor has an enhancement mode and a first conductive type. A channel region of the third selecting transistor has a depletion mode and a second conductive type.

    Abstract translation: 半导体器件包括位线，第一单元串和第二单元串。 第一单元串包括串联连接到位线并且具有大于第一参考电压的阈值电压的第一选择晶体管，具有小于第二参考电压的阈值电压的第二选择晶体管，单元晶体管和接地选择晶体管 。 第二单元串包括串联连接到位线并且具有小于第一参考电压的阈值电压的第三选择晶体管，具有大于第二参考电压的阈值电压的第四选择晶体管，单元晶体管和接地选择晶体管 。 第一选择晶体管的沟道区具有增强模式和第一导电类型。 第三选择晶体管的沟道区具有耗尽模式和第二导电类型。

    Flash memory device and operating method for concurrently applying different bias voltages to dummy memory cells and regular memory cells during erasure
    22.
    发明授权
    Flash memory device and operating method for concurrently applying different bias voltages to dummy memory cells and regular memory cells during erasure 有权
    闪存器件和操作方法，用于在擦除期间同时向虚拟存储器单元和常规存储器单元施加不同的偏置电压

    公开(公告)号：US08699274B2

    公开(公告)日：2014-04-15

    申请号：US13680812

    申请日：2012-11-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chang-Hyun Lee ,  Jung-Dal Choi ,  Byeong-In Choe

    IPC: G11C16/28

    CPC classification number: G11C16/06 ,  G11C16/0483 ,  G11C16/16 ,  G11C16/30

    Abstract: Integrated circuit flash memory devices, such as NAND flash memory devices, include an array of regular flash memory cells, an array of dummy flash memory cells and an erase controller. The erase controller is configured to concurrently apply a different predetermined bias voltage to the dummy flash memory cells than to the regular flash memory cells during an erase operation of the integrated circuit flash memory device. Related methods are also described.

    Abstract translation: 诸如NAND闪存器件的集成电路闪存器件包括常规闪存单元阵列，虚拟闪存单元阵列和擦除控制器。 擦除控制器被配置为在集成电路快闪存储器件的擦除操作期间同时向虚拟闪存单元施加不同于常规闪存单元的预定偏置电压。 还描述了相关方法。

    Technique for controlling equipment based on biometric information
    23.
    发明授权
    Technique for controlling equipment based on biometric information 有权

    公开(公告)号：US11526183B2

    公开(公告)日：2022-12-13

    申请号：US16598322

    申请日：2019-10-10

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Byeong-Hoon Kwak ,  Chang-Hyun Lee ,  Jae-Ho Jung ,  Yang-Wook Kim ,  Yong-Chan Lee

    IPC: G05D23/19 ,  G06F3/01 ,  G06F3/16 ,  G16H40/63 ,  G16H50/20 ,  F24F11/50 ,  A61B5/01 ,  A61B5/024 ,  A61B5/0533 ,  A61B5/00 ,  G16H10/60 ,  F24F110/10

    Abstract: This disclosure relates to technologies for a sensor network, machine-to-machine (M2M) communication, machine type communication (MTC), and Internet of Things (IoT). This disclosure can be utilized in intelligent services based on the above technologies, such as smart homes, smart buildings, smart cities, smart cars or connected cars, health care, digital education, retail sales, security and safety related services, etc. This disclosure relates to a method for generating an instruction for controlling equipment on the basis of biometric information, comprising: a step of obtaining at least one biometric information; a step of determining whether to calculate a calorific value by using stored biometric information and the obtained biometric information, and calculating the calorific value by using the stored biometric information and the obtained biometric information according to the determined result; and generating an instruction for controlling the equipment on the basis of the calculated calorific value.

    Method and apparatus for controlling electronic device
    24.
    发明授权
    Method and apparatus for controlling electronic device 有权

    公开(公告)号：US11374782B2

    公开(公告)日：2022-06-28

    申请号：US16061197

    申请日：2016-12-23

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jae-Eun Kang ,  Kyung-Jae Kim ,  Yang-Wook Kim ,  Chang-Hyun Lee ,  Jae-Ho Jung

    IPC: H04L12/28 ,  H04L29/08 ,  G06F3/0482 ,  G06F3/0484 ,  H04L67/125 ,  H04L65/40 ,  H04W4/70 ,  G06F3/04847 ,  H04W4/80

    Abstract: The present disclosure relates to a technology for a sensor network, machine to machine (M2M), machine type communication (MTC), and Internet of things (TOT). The present disclosure can be utilized for intelligent services (smart home, smart building, smart city, smart car or connected car, healthcare, digital education, retail, security and safety related services, etc.) on the basis of the above technology. The present disclosure provides a method and apparatus for controlling operations of electronic devices. According to the present disclosure, a method for controlling electronic devices by a control device comprises the steps of: collecting, by the control device, sensing information through at least one sensor; determining, by the control device, a user's situation on the basis of the collected sensing information; displaying at least one candidate control mode among a plurality of pre-stored control modes on the basis of the result of the determination; receiving a selection input for selecting one control mode from the at least one displayed candidate control mode; and transmitting a control command for at least one electronic device which can be controlled in the one control mode, in response to the selection input.

    Vertical-type non-volatile memory devices having dummy channel holes
    26.
    再颁专利
    Vertical-type non-volatile memory devices having dummy channel holes 有权

    公开(公告)号：USRE48473E1

    公开(公告)日：2021-03-16

    申请号：US15720227

    申请日：2017-09-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chang-Hyun Lee

    IPC: H01L27/115 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11565

    Abstract: A vertical-type nonvolatile memory device is provided in which differences between the sizes of channel holes in which channel structures are formed are reduced. The vertical-type nonvolatile memory device includes a substrate having channel hole recess regions in a surface thereof. Channel structures vertically protrude from the surface of the substrate on ones of the channel hole recess regions, and memory cell stacks including insulating and conductive layers are alternately stacked along sidewalls of the channel structures. A common source line extends along the surface of the substrate on other ones of the channel hole recess regions in a word line recess region, which separates adjacent memory cell stacks. Related fabrication methods are also discussed.

    VERTICAL MEMORY DEVICES WITH VERTICAL ISOLATION STRUCTURES AND METHODS OF FABRICATING THE SAME
    30.
    发明申请
    VERTICAL MEMORY DEVICES WITH VERTICAL ISOLATION STRUCTURES AND METHODS OF FABRICATING THE SAME 审中-公开
    具有垂直隔离结构的垂直存储器件及其制造方法

    公开(公告)号：US20150340377A1

    公开(公告)日：2015-11-26

    申请号：US14814623

    申请日：2015-07-31

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chang-Hyun Lee

    IPC: H01L27/115 ,  H01L29/16 ,  H01L29/04 ,  H01L29/792

    CPC classification number: H01L27/11582 ,  H01L27/11556 ,  H01L27/11578 ,  H01L29/04 ,  H01L29/16 ,  H01L29/66833 ,  H01L29/7926

    Abstract: A vertical memory device includes a substrate, a column of vertical channels on the substrate and spaced apart along a direction parallel to the substrate, respective charge storage structures on sidewalls of respective ones of the vertical channels and gate electrodes vertically spaced along the charge storage structures. The vertical memory device further includes an isolation pattern disposed adjacent the column of vertical channels and including vertical extension portions extending parallel to the vertical channels and connection portions extending between adjacent ones of the vertical extension portions.

    Abstract translation: 垂直存储器件包括衬底，衬底上的垂直通道列，并沿着平行于衬底的方向间隔开，相应的垂直通道的侧壁上的电荷存储结构和沿着电荷存储结构垂直间隔开的栅电极 。 垂直存储装置还包括邻近垂直通道列布置的隔离图案，并且包括平行于垂直通道延伸的垂直延伸部分和在相邻的垂直延伸部分之间延伸的连接部分。

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